Magnetoresistive memory having elevated interference immunity

Static information storage and retrieval – Systems using particular element – Magnetoresistive

Reexamination Certificate

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C365S173000

Reexamination Certificate

active

06366494

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to a magnetoresistive write-read memory (MRAM) whose storage effect consists in the magnetically controlled electrical resistance of the memory is locations.
International PCT publication WO 95/10112 and U.S. Pat. No. 5,699,293 teach a non-volatile write/read memory in which a non-magnetic non-conductive layer is present between two ferromagnetic layers, with one layer having a fixed orientation and the other layer having a magnetic orientation that is defined by the operation. The resistance across the two ferromagnetic layers varies with the orientation of the respective magnetic moments.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a magnetoresistive read/write memory, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which makes it possible to increase the interference immunity given an optimally small chip surface area.
With the foregoing and other objects in view there is provided, in accordance with the invention, a magnetoresistive memory, comprising a vertically stacked assembly of a layer for a first bit line, a magnetoresistive layer system of a first memory location, a layer for word lines, a magnetoresistive layer system of a second memory location, and a layer for an second bit line vertically stacked on top of one another, wherein logic states to be stored in the first memory location and the second memory location are inverses of one another.
In accordance with an added feature of the invention, the second memory location in a described state always comprises an inverse state of a state of the first location beneath it, and wherein a current in the bit line flows in a direction opposite to a direction of a current in the second bit line situated above it.
In accordance with a concomitant feature of the invention, each magnetoresistive layer system comprises a magnetically soft layer, a magnetically hard layer, and a thin tunnel oxide separating the two magnetic layers from one another.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a magnetoresistive memory having elevated interference immunity, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of is equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.


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patent: 197 44 095 (1999-04-01), None
patent: 0 773 551 (1997-05-01), None
patent: 09 073 773 (1997-03-01), None
patent: WO 95/10112 (1995-04-01), None

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