Magnetoresistive memory device assemblies

Details Magnetoresistive memory device assemblies Magnetoresistive memory device assemblies

2002-11-21

2004-08-24

Le, Dung (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S310000, C438S003000, C438S257000, C365S240000, C365S210130

Reexamination Certificate

active

06781174

ABSTRACT:

TECHNICAL FIELD
The invention pertains to methods of forming magnetoresistive memory devices, and to methods of forming assemblies comprising magnetoresistive memory devices, such as, for example, methods of forming MRAM arrays. The invention also pertains to assemblies comprising magnetoresistive memory devices, such as, for example, MRAM arrays.
BACKGROUND OF THE INVENTION
Magnetic random access memory (MRAM) devices are showing increasing promise for utilization as memory storage devices of the future. MRAM is a type of digital memory in which digital bits of information comprise alternative states of magnetization of magnetic materials in memory cells. The magnetic materials can be thin ferromagnetic films. Information can be stored and retrieved from the memory devices by inductive sensing to determine a magnetization state of the devices, or by magnetoresistive sensing of the magnetization states of the devices. It is noted that the term “magnetoresistive device” can be utilized to characterize a memory device and not the access device, and accordingly a magnetoresistive device can be accessed by, for example, either inductive sensing or magnetoresistive sensing methodologies.
A significant amount of research is currently being invested in magnetic digital memories, such as, for example, MRAM's, because such memories are seen to have significant potential advantages relative to the dynamic random access memory (DRAM) components and static random access memory (SRAM) components that are presently in widespread use. For instance, a problem with DRAM is that it relies on electric charge storage within capacitors. Such capacitors leak electric charge, and must be refreshed at approximately 64-128 millisecond intervals. The constant refreshing of DRAM devices can drain energy from batteries utilized to power the devices, and can lead to problems with lost data since information stored in the DRAM devices is lost when power to the devices is shutdown.
SRAM devices can avoid some of the problems associated with DRAM devices, in that SRAM devices do not require constant refreshing. Further, SRAM devices are typically faster than DRAM devices. However, SRAM devices take up more semiconductor real estate than do DRAM devices. As continuing efforts are made to increase the density of memory devices, semiconductor real estate becomes increasingly valuable. Accordingly, SRAM technologies are difficult to incorporate as standard memory devices in memory arrays.
MRAM devices have the potential to alleviate the problems associated with DRAM devices and SRAM devices. Specifically, MRAM devices do not require constant refreshing, but instead store data in stable magnetic states. Further, the data stored in MRAM devices will remain within the devices even if power to the devices is shutdown or lost. Additionally, MRAM devices can potentially be formed to utilize less than or equal to the amount of semiconductor real estate associated with DRAM devices, and can accordingly potentially be more economical to incorporate into large memory arrays than are SRAM devices.
Although MRAM devices have potential to be utilized as digital memory devices, they are currently not widely utilized. Several problems associated with MRAM technologies remain to be addressed. It would be desirable to develop improved methods for operation of MRAM devices.
FIG. 1
illustrates a fragment of an exemplary prior art construction
10
comprising an MRAM device
12
. More specifically, construction
10
comprises a substrate
14
having a conductive line
16
formed thereover, and device
12
is formed over the conductive line.
Substrate
14
can comprise an insulative material, such as, for example, borophosphosilicate glass (BPSG), silicon dioxide and/or silicon nitride. Such insulative material can be formed over a semiconductive material, such as, for example, monocrystalline silicon. Further, various integrated circuit devices can be supported by the semiconductive material. In the construction of
FIG. 1
, substrate
14
is illustrated generically as a homogeneous mass, but it is to be understood from the discussion above that substrate
14
can comprise numerous materials and layers. In the event that substrate
14
comprises a semiconductive material, such semiconductive material can be, for example, monocrystalline silicon lightly-doped with a background p-type dopant. To aid in interpretation of the claims that follow, the terms “semiconductive substrate” and “semiconductor substrate” are defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductive substrates described above.
Conductive line
16
can comprise, for example, various metals and metal alloys, such as, for example, copper and/or aluminum.
The MRAM device
12
formed over line
16
comprises three primary layers,
18
,
20
and
22
. Layers
18
and
22
comprise soft magnetic materials, such as, for example, materials comprising one or more of nickel, iron, cobalt, iridium, manganese, platinum and ruthenium. Layers
18
and
22
can be the same composition as one another, or different from one another.
Layer
20
comprises a non-magnetic material. The non-magnetic material can be an electrically conductive material (such as copper) in applications in which the MRAM is to be a giant magnetoresistive (GMR) device, or can be an electrically insulative material (such as, for example, aluminum oxide (Al
2
O
3
) or silicon dioxide), in applications in which the MRAM device is to be a tunnel magnetoresistive (TMR) device.
Layers
18
and
22
have magnetic moments associated therewith. The magnetic moment in layer
18
is illustrated by arrows
19
, and the magnetic moment in layer
22
is illustrated by arrows
21
. In the shown construction, the magnetic moment in layer
22
is anti-parallel to the magnetic moment in layer
18
. Such is one of two stable orientations for the magnetic moment of layer
22
relative to that of
18
, with the other stable orientation being a parallel orientation of the magnetic moment in layer
22
relative to the moment in layer
18
. One of layers
18
and
22
can have a pinned orientation of the magnetic moment therein, and such can be accomplished by providing a hard magnetic layer, or in other words a permanent magnet (not shown) adjacent the layer. The layer having the pinned magnetic moment can be referred to as a reference layer.
In operation, MRAM device
12
can store information as a relative orientation of the magnetic moment in layer
22
to that in layer
18
. Specifically, either the anti-parallel or parallel orientation of the magnetic moments of layers
18
and
22
can be designated as a 0, and the other of the anti-parallel and parallel orientations can be designated as a 1. Accordingly, a data bit can be stored within device
12
as the relative orientation of magnetic moments in layers
18
and
22
.
A conductive line
24
is shown over layer
22
, and such conductive line extends into and out of the plane of the page. Conductive line
24
can comprise, for example, one or more metals and/or metal alloys, including, for example, copper and/or aluminum.
An insulative material
26
extends over conductive line
16
, and along the sides of bit
12
and conductive line
24
. Insulative material
26
can comprise, for example, BPSG.
The construction
10
is an exemplary MRAM construction, and it is to be understood that various modifications can be made to the construction
10
for various applications. For instance, one or more electrically insulative layers (not shown) can be provided between device
12
and one or both of conductive lines
16
and
24
. Also, one or more magnetic layers (not shown) can be stacked within device
12
i

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