Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-03-15
2003-07-15
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S421000
Reexamination Certificate
active
06593608
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to magneto resistive storage devices and, more particularly, the present invention relates to magneto resistive storage devices that utilize a double tunnel junction for enhanced bit storage.
Magnetic Random Access Memory (“MRAM”) is a non-volatile memory that is being considered for short-term and long-term data storage. MRAM has lower power consumption than short-term memory such as DRAM, SRAM and Flash memory. MRAM can perform read and write operations much faster (by orders of magnitude) than conventional long-term storage devices such as hard drives. In addition, MRAM is more compact and consumes less power than hard drives. MRAM is also being considered for embedded applications such as extremely fast processors and network appliances.
A typical MRAM device includes an array of memory cells, word lines extending along rows of the memory cells, and bit lines extending along columns of the memory cells. Each memory cell is located at a cross point of a word line and a bit line.
The memory cells may be based on tunneling magneto-resistive (TMR) devices such as spin dependent tunneling junctions (SDT). A typical SDT junction includes a pinned layer, a sense layer and an insulating tunnel barrier sandwiched between the pinned and sense layers. The pinned layer has a magnetization orientation that is fixed so as not to rotate in the presence of an applied magnetic field in a range of interest. The sense layer has a magnetization that can be oriented in either of two directions; the same direction as the pinned layer magnetization or the opposite direction of the pinned layer magnetization. If the magnetizations of the pinned and sense layers are in the same direction, the orientation of the SDT junction is said to be “parallel.” If the magnetizations of the pinned and sense layers are in opposite directions, the orientation of the SDT junction is said to be “anti-parallel.” These two stable orientations, parallel and anti-parallel, may correspond to logic values of ‘0’ and ‘1.’
The magnetization orientation of the pinned layer may be fixed by an underlying antiferromagnetic (AF) pinning layer. The AF pinning layer provides a large exchange field, which holds the magnetization of the pinned layer in one direction. Underlying the AF layer are usually first and second seed layers. The first seed layer allows the second seed layer to be grown with a <111> crystal structure orientation. The second seed layer establishes a <111> crystal structure orientation for the AF pinning layer and other subsequently grown magnetic layers.
Advances have been made that have found that multiple pinned reference layers can be set independently, but must be grown on the <111> crystal structure in order to provide a more responsive reference layer. Further, it has been proposed in prior solutions to utilize a double magnetic tunnel junction having a single sense layer and two separate pinned layers. What is lacking, however, is the ability to provide a double MTJ cell that overcomes the need for pinning or pinned layers and the complicated materials required for their manufacture.
SUMMARY OF THE INVENTION
According to the present invention, a magnetic memory device is disclosed that includes a magneto-resistive cell that has a double tunnel junction utilizing soft reference layers.
Additional features and advantages of the invention will be apparent from the detailed description which follows, taken in conjunction with the accompanying drawings, which together illustrate, by way of example, features of the invention.
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Sharma Manish
Tran Lung T.
Hewlett--Packard Development Company, L.P.
Ho Tu-Tu
Nelms David
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