Static information storage and retrieval – Systems using particular element – Magnetoresistive
Reexamination Certificate
2001-11-14
2002-07-16
Elms, Richard (Department: 2824)
Static information storage and retrieval
Systems using particular element
Magnetoresistive
Reexamination Certificate
active
06421270
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a magneto-resistive random access memory (MRAM), and more specifically, to an MRAM with information stored therein can be accurately accessed.
2. Description of the Prior Art
Please refer to
FIG. 1
of a schematic view of a magneto-resistive random access memory (MRAM)
10
according to the prior art. As shown in
FIG. 1
, the MRAM
10
comprises at least one memory cell array
12
, a row decoder
13
and a column decoder
15
. The memory cell array
12
comprises a bias source
18
, magneto-resistors
19
,
119
,
219
and
319
, word lines
16
,
116
,
216
and
316
connected to the row decoder
13
, and a switch
17
connected to the column decoder
17
. An overall resistance of the memory cell array
12
is equal toa sum of resistances of the magneto-resistors
19
,
119
,
219
and
319
.
As the switch
17
is turned on by the column decoder
15
, the bias source
18
provides a current with a fixed value to the magneto-resistors
19
,
119
,
219
and
319
. An output voltage, representing bit information stored in selected magneto-resistor of the memory cell array
12
, of the bias source
18
is then read as one of the word lines
16
,
116
,
216
and
316
is electrically connected to the row decoder
13
. The bit information stored in each magneto-resistor of the memory cell array
12
is determined by a magnetized direction of respective magneto-resistor.
Please refer to
FIG. 2
of the schematic view of another MRAM
20
according to the prior art. As shown in
FIG. 2
, the MRAM
20
comprises a bias source
21
having a current mirror
22
, two PMOS transistors
24
and
124
, a magneto-resistor
26
and a switch
83
. The bit information stored in the MRAM
20
is determined by a magnetized direction of the magneto-resistor
26
. The current mirror
22
, comprising PMOS transistors
27
,
127
,
227
and
327
, and NMOS transistors
29
,
129
,
229
and
329
, is a device providing currents to the PMOS transistors
24
and
124
with a same value or a value with a fixed proportion. The magneto-resistor
26
is electrically connected to both an address decoder
81
and a switch
83
. A startup circuit
28
is employed to initiate the current mirror
22
of the bias source
21
.
A fixed voltage
23
is applied to both the current mirror
22
and the PMOS transistor
24
. If width/length ratios (W/L ratios) of the PMOS transistors
27
,
127
,
24
are the same, a sensing current
25
which passes through the magneto-resistor
26
is the same as currents passing through the PMOS transistors
27
,
127
. The W/L ratios of the PMOS transistors
27
,
127
,
24
determine the currents flowing through the PMOS transistors
27
,
127
,
24
. If the W/L ratios of the PMOS transistors
27
,
127
,
24
have a ratio of 1:m:n, then a ratio of the currents flowing through the PMOS transistors
27
,
127
,
24
is 1:m:n. Therefore, the currents passing through the PMOS transistors
27
,
127
,
24
can be adjusted by changing their W/L ratios.
The current mirror
22
and the PMOS transistor
24
are both operated in a saturation region to ensure a constant sensing current
25
. When the switch
83
is turned on and the magneto-resistor
26
is selected by the address decoder
81
, the constant sensing current
25
will flow through the magneto-resistor
26
. Then the information stored in the magneto-resistor
26
can be detected by measuringa product of the sensing current
25
and the resistance of the magneto-resistor
26
.
However, the magneto-resistor
26
may not be formed with an accurate resistance. If the resistance has a value beyond an acceptable range, the product of the sensing current
25
and the resistance of the magneto-resistor
26
will reach an unacceptable value. This will cause the PMOS transistors
24
and
124
to operate in a triode region, and the sensing current
25
will become unstable. Consequently, a signal to noise ratio (SNR) of the device is decreased, the accuracy of information detection is seriously damaged, and the performance of the MRAM is reduced.
SUMMARY OF THE INVENTION
It is therefore a primary object of the claimed invention to provide a magneto-resistive random access memory (MRAM) with an adjustable sensing current to solve the above mentioned problems.
According to the claimed invention, the magneto-resistive random access memory (MRAM) includes a bias source, a first magneto-resistor and an address decoder. The bias source includes a current mirror for mirroring current, and a bandgap circuit connected to the current mirror for providing a fixed voltage across a second magneto-resistor. The first magneto-resistor has an array of magneto-resistors electrically connected to the bias source for storing bit information. The address decoder is electrically connected to the first magneto-resistor for selecting the array of magneto-resistors so as to access the bit information. The current mirror mirrors current onto the first magneto-resistor to generate a sensing current through the first magneto-resistor so that the voltage across the second magneto-resistor is proportional to a voltage across the first magneto-resistor.
It is an advantage of the claimed invention that the voltage across the second magneto-resistor is proportional to the voltage across the first magneto-resistor. Therefore, the information stored in the first magneto-resistor can be accurately accessed.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment, which is illustrated in the multiple figures and drawings.
REFERENCES:
patent: 6324093 (2001-11-01), Perner et al.
AMIC Technology (Taiwan) Inc.
Elms Richard
Nguyen Van Thu
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