Magnetic tunnel junction memory cell with in-stack biasing of th

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

257421, 257422, 257423, 257424, 257425, 257426, 257427, 365171, 365173, 365158, H01L 2976

Patent

active

061147192

ABSTRACT:
A magnetic tunnel junction (MTJ) memory cell uses a biasing ferromagnetic layer in the MTJ stack of layers that is magnetostatically coupled with the free ferromagnetic layer in the MTJ stack to provide transverse and/or longitudinal bias fields to the free ferromagnetic layer. The MTJ is formed on an electrical lead on a substrate and is made up of a stack of layers. The layers in the MTJ stack are an antiferromagnetic layer, a fixed ferromagnetic layer exchange biased with the antiferromagnetic layer so that its magnetic moment cannot rotate in the presence of an applied magnetic field, an insulating tunnel barrier layer in contact with the fixed ferromagnetic layer, a free ferromagnetic layer in contact with the tunnel barrier layer and whose magnetic moment is free to rotate in the presence of an applied magnetic field, and whose moment, in the absence of any applied field, is generally either parallel or antiparallel to that of the fixed ferromagnetic layer, a biasing ferromagnetic layer that has its magnetic moment aligned generally in the plane of the MTJ, and a nonferromagnetic electrically conductive spacer layer separating the biasing ferromagnetic layer from the other layers in the stack. The self field or demagnetizing field from the biasing layer magnetostatically couples with the edges of the free layer so as to provide a transverse bias field, which results in a coherent rotation of the moment of the free layer, and/or a longitudinal bias field, which assures that the two states of the memory cell are equally stable with respect to magnetic field excursions.

REFERENCES:
patent: 5640343 (1997-06-01), Gallagher et al.
patent: 5650958 (1997-07-01), Gallagher et al.
patent: 5729410 (1998-03-01), Fontana, Jr. et al.
patent: 5841692 (1998-11-01), Gallagher et al.
patent: 5864498 (1999-01-01), Womack
patent: 5936293 (1999-08-01), Parkin
patent: 5966012 (1999-10-01), Parkin
patent: 5966323 (1999-10-01), Chen et al.
patent: 5982660 (1999-11-01), Bhattacharyya et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Magnetic tunnel junction memory cell with in-stack biasing of th does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Magnetic tunnel junction memory cell with in-stack biasing of th, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Magnetic tunnel junction memory cell with in-stack biasing of th will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2214834

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.