Static information storage and retrieval – Read/write circuit – Including magnetic element
Reexamination Certificate
2002-06-27
2003-07-22
Lebentritt, Michael S. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including magnetic element
C365S158000
Reexamination Certificate
active
06597618
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to circuitry for controlling Magnetic Tunnel Junction (MTJ) devices for Magnetic Random Access Memory (MRAM) devices.
MTJ devices for providing an MRAM are becoming popular and are considered to be of merit because they provide high data read speeds and enable provision of a memory device which is non-volatile.
A typical structure of an MTJ includes a substrate onto which is formed a bottom lead. A seed layer is formed on the bottom lead and then an antiferromagnetic (AFM) layer formed on the seed layer. Above this is formed a pinned ferromagnetic layer, followed by an insulator layer and a free ferromagnetic layer. The free ferromagnetic layer is then capped and a top lead layer formed thereon. In simple terms, when the magnetisation of the free layer is parallel to that of the pinned layer the resistance of the device is low. However, when free layer magnetisation is anti-parallel to that of the pinned layer the resistance of the device is high.
Usually, the magnetisation of the pinned layer is fixed by the AFM layer. The magnetisation of the free layer can be changed from parallel to anti-parallel to that of the pinned layer by application of an external field. Using the properties of the device the magnetisation of the free layer can be used to record data. The different magnetisation states represent different resistance for the cell and the resistance can represent a “0” or a “1” and act as a memory. Of course, in practice it is desirable to produce an array of MTJ devices, and this is usually done with individual devices in the array being connected in parallel. In such a case each of the devices in a cell connected at the cross junctions of the column and row lines of the array of cells. Mutual electrical connections are provided between all of the MTJ cells. However, this provides a shunting arrangement which has disadvantages. For example, the shunting arrangement adversely affects signal to noise ratio in a read operation, and has a further disadvantage in that in such a configuration the individual resistance and magneto resistance of a particular device in the array can not be detected separately and directly.
PRIOR ART
Improvements of the above arrangement have been suggested, and these include a provision of a diode or switching transistor for each device in the array. Discussion of this technology can be found, for example, in U.S. Pat. No. 5640343 or in IEE Transactions, Magnetics 35(5), 2820(1999), Hans Boeve, et al. Provision of these extra components increases the overall cost of the memory array, however, and makes it difficult to produce a small device.
A further problem associated with such arrays is that, as storage density increases, cell dimension and lead wire width decrease, which results in an increase in connector resistance and decrease in relative cell resistance, causing problems in terms of increased signal to noise ratio.
The present invention seeks to provide a circuit for controlling MTJ devices for use in a magnetic random access memory, together with a MRAM which is free of the shunting effect found in prior art devices. It also seeks to overcome the problems associated with prior art devices in relation to connection lead resistance.
SUMMARY OF THE INVENTION
According to the present invention there is provided a circuit for controlling a read operation for a magnetic random access memory (MRAM) comprising an array of magnetic tunnel junctions (MTJ) having conducting row and column lines attached thereto, the circuitry comprising:
a current supply for providing a read current;
a row selector for selecting a row containing a junction to be read and applying the read current to that row with the respective row line;
an unselected row switch for switching to at least some of the row lines not connected to the MTJ to be read;
a voltage source for applying, via the unselected row switch, a voltage to each of the unselected row lines that is substantially identical to the voltage on the selected row line;
a column selector for selecting the column line connected to the array containing the MTJ to be read; and
a voltage detector for detecting the voltage across the MTJ to be read via the selected column and row lines.
The voltage source may comprise a voltage follower having an input attached to the read current source and having an output attached to the input of the unselected row switch, and the voltage follower may comprise an appropriately configured operational amplifier.
According to the present invention there is also provided a magnetic random access memory comprising an array of magnetic tunnel junctions, each MTJ connected across a grid of electrically transmissive column and row lines to define a series of rows and columns of MTJ's; and
a circuit of the type defined above.
In an MRAM according to the present invention the read lines may define the row lines, with the write lines defining the column lines.
A corresponding method is also provided.
REFERENCES:
patent: 5640343 (1997-06-01), Gallagher et al.
patent: 6259644 (2001-07-01), Tran et al.
patent: 6304477 (2001-10-01), Naji
patent: 6317375 (2001-11-01), Perner
patent: 6341084 (2002-01-01), Numata et al.
patent: 6418046 (2002-07-01), Naji
patent: 2001325791 (2001-11-01), None
Boeve, H. et al., IEEE Transactions on Magnetics, vol. 35(5), 2820-2825 (Sep., 1999).
Wang Xiaoyan
Wu Yihong
You Dan
Zheng Yuankai
Data Storage Institute
Lebentritt Michael S.
Phung Anh
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