Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-12-30
2004-03-16
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S296000, C257S300000
Reexamination Certificate
active
06707085
ABSTRACT:
BACKGROUND
1. Technical Field
A magnetic random access memory (abbreviated as ‘MRAM’) is disclosed. More specifically, an improved MRAM having a higher speed than an SRAM, integration density as high as a DRAM, and the properties of a nonvolatile memory such as a flash memory, is disclosed
2. Description of the Related Art
Most of the semiconductor memory manufacturing companies have developed the MRAM which uses a ferromagnetic material as one of the next generation memory devices.
The MRAM is a memory device for reading and writing information by forming multi-layer ferromagnetic thin films, and sensing current variations according to a magnetization direction of the respective thin films. The MRAM has high speed, low power consumption and high integration density due to the special properties of the magnetic thin film, and performs a nonvolatile memory operation such as a flash memory.
In its function as a memory device, the MRAM utilizes a giant magneto resistive (GMR) or spin-polarized magneto-transmission (SPMT) phenomenon, which is generated when the spin influences electron transmission.
The MRAMs using GMR phenomenon utilize a phenomenon in which resistance is remarkably varied when spin directions are different in two magnetic layers having a non-magnetic layer disposed between the two magnetic layers.
The MRAMs using SPMT utilize a phenomenon in which larger current transmission is generated when spin directions are identical in two magnetic layers having an insulating layer disposed therebetween.
MRAM research, however, is still in its early stages, and is concentrated mostly on the formation of multi-layer magnetic thin films and less on the research of unit cell structure and peripheral sensing circuits.
FIGS. 1
a
and
1
b
are a cross-sectional view and a layout view, respectively, of a conventional MRAM. One bit line and one word line are formed in pairs for each magnetic tunnel junction (MTJ) cell, which makes it difficult to obtain spacing between metal wires. Here,
FIG. 1
a
is a cross-sectional view taken along line A—A of
FIG. 1
b.
Referring to
FIG. 1
a,
the conventional MRAM includes first word lines
13
, which are a pair of gates formed on a semiconductor substrate
11
. A first impurity junction region
15
-
1
and a pair of second impurity junction regions
15
-
2
are also formed on the semiconductor substrate
11
. The first impurity junction region
15
-
1
is disposed between the pair of first word lines
13
, and the second impurity junction regions
15
-
2
are disposed on both sides of the first impurity junction region
15
-
1
so that the pair of first word lines
13
lies on the semiconductor substrate
11
between the first impurity junction region
15
-
1
and the second impurity junction regions
15
-
2
. A ground line
23
is connected to the first impurity junction region
15
-
1
through a contact plug
19
. A pair of connection layers
27
is connected to the pair of second impurity junction regions
15
-
2
through a stacked structure of a first contact plug
17
, a conductive layer
21
, and a second contact plug
24
. Second word lines
25
are formed above the first word lines
13
and disposed below the connection layers
27
. The pair of MTJ cells
29
is formed on the connection layers
27
that are disposed above the second word line
25
, and has a width as large as that of the second word lines
25
. Bit lines
33
are connected to the MTJ cells
29
through third contact plugs
31
that are vertical to the first and the second word lines
13
and
25
. The ground line
23
is formed at the center portion, and the first word lines
13
, the connection layers
27
, the second word lines
25
, and the MTJ cells
29
are symmetrically formed with respect to the ground line
23
.
Referring to
FIG. 1
b,
in area of one MRAM cell is 2F×6F, i.e., 12F2, where ‘F’ is the minimum size of a line/space width that can be formed according to a lithography process.
As described above, the conventional MRAM has one bit line and word lines formed in pairs for each MTJ cell
29
. This makes it difficult to obtain sufficient spacing for metal wires in order to achieve a high integration density of the device due to increased cell size.
SUMMARY
A magnetic random access memory (MRAM) is disclosed, which achieves high integration by forming a second word line that serves as two write lines of MRAMs arranged vertically so that one line can apply a magnetic field to two MTJ cells.
There is provided an MRAM including a pair of first word lines formed on a semiconductor substrate; a first impurity junction region and a pair of second impurity junction regions formed on the semiconductor substrate, the first impurity junction region disposed between the pair of first word lines and the pair of second impurity junction regions disposed on both sides of the first impurity junction region so that the pair of first word lines lies on the semiconductor substrate between the first impurity junction region and the pair of second impurity junction regions; a ground line connected to the first impurity junction region; a pair of connection layers respectively connected to the pair of second impurity junction regions; a pair of MTJ cells respectively connected to the pair of connection layers; a pair of bit lines respectively connected to the pair of MTJ cells; a second word line, which is a write line, formed above the ground line to be electrically isolated from the ground line; and a metal wire connected to the second word line, the metal wire running in the perpendicular direction to the pair of bit lines, and wherein each bit line has a thickness ranging from 4000 to 5000 Å. The distance between the MTJ cell and the metal wire ranges from 10000 to 50000 Å. The distance between the bit line and the metal wire ranges from 1000 to 3000 Å. The second word line is used as an outbound current path, the metal wire and second word line is connected by a metal wire contact plug, and the distance between the MTJ cell and the metal wire contact plug ranges from 0.5 F to 1.9 P.
REFERENCES:
patent: 6445612 (2002-09-01), Naji
patent: 6518588 (2003-02-01), Parkin et al.
Jang In Woo
Kim Chang Shuk
Lee Kye Nam
Park Young Jin
Hynix Semiconductor Inc
Marshall & Gerstein & Borun LLP
Nelms David
Nguyen Thinh T
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