Magnetic random access memory

Static information storage and retrieval – Systems using particular element – Magnetoresistive

Reexamination Certificate

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Details

C365S097000, C365S066000, C365S055000, C365S008000, C365S033000, C365S196000

Reexamination Certificate

active

06795336

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a magnetic random access memory (hereinafter, referred to as ‘MRAM’), and in particular, to an MRAM having magnetic tunnel junctions (hereinafter, referred to as ‘MTJ’) between gate metal electrodes and active regions of semiconductor substrates, the MRAM which can read and write two or more data by controlling current flowing through MTJ and current flowing from drain region to source region.
2. Description of the Prior Art
Nonvolatile memories are more required to overcome limitations of volatile memories as the demand for portable or communication appliances increases. The volatile memories may lose data when power is turned off. However, the nonvolatile memories are not restricted in number of write and read. As a result, MRAMs is developed using differences of magnetic resistance according to relative arrangements in electrodes.
The MRAM store magnetic polarization in a magnetic thin film, and perform read and write operations by changing or sensing magnetization orientation according to magnetic fields generated by combining currents in bit and word lines.
The MRAM may be embodied by using alternative magnetoresistive effects such as GMR (giant magneto resistance) or spin polarization magneto permeation, which are generated due to influence of spins on transmission of electrons. In general, the MRAMs read and write data by utilizing devices using magnetic phenomena such as GMR or MTJ as memory cell.
First, the MRAM using giant magneto resistance is embodied by using a phenomenon wherein resistance is more differentiated when spin directions are anti-parallel than when parallel in two magnetic layers having an insulating layer therebetween. Second, the MRAM using spin polarization magnetic permeation is embodied by using a phenomenon wherein the current is better permeated when spin directions are parallel than when anti-parallel in two magnetic layers having an insulating layer therebetween.
FIG. 1
is a diagram of a cell array of the conventional MRAM.
An MRAM cell of
FIG. 1
includes a plurality of word lines WL
1
~WL
4
, a plurality of bit lines BL
1
~BL
2
and sense amplifiers SA
1
and SA
2
coupled with a plurality of bit lines BL
1
and BL
2
. A cell
1
selected by word lines and bit lines includes a switching transistor T and an MTJ.
First, when a word line WL
4
of a plurality word lines WL
1
~WL
4
is selected by a word line selecting signal, a predetermined voltage is applied to an MTJ by turn-on of a switching transistor T. As a result, a current having different values according to the magnetization orientation of an MTJ flows into a selected bit line BL
2
, and then a sense amplifier SA
2
senses the current of the bit line BL
2
.
FIGS. 2
a
and
2
b
are diagrams of the above-described MTJs.
As shown in
FIGS. 2
a
and
2
b
, the top portion of an MTJ includes a free ferromagnetic layer
2
, and its bottom of a fixed ferromagnetic layer
4
. The free ferromagnetic layer
2
and the fixed ferromagnetic layer
4
consists of NiFeCo/CoFe.
The thickness of the free ferromagnetic layer
2
is different from that of the fixed ferromagnetic layer
4
. The fixed ferromagnetic layer
4
changes the magnetization orientation only by a strong magnetic field. On the contrary, the free ferromagnetic layer
2
changes the magnetization orientation only by a weak magnetic field. Here, if a weak magnetic field is used, the magnetization orientation of a free ferromagnetic layer is changed, whilethat of a fixed ferromagnetic layer is fixed at one direction, and then a fixed layer is formed. As a result, a magnetic field is generated to change only the magnetization orientation of the top layer without changing the magnetization orientation of the bottom layer during the write operation.
A tunnel oxide film
3
is formed between a free ferromagnetic layer
2
and a fixed ferromagnetic layer
4
, the tunnel oxide film
3
consisting of Al
2
O
3
.
Here,
FIG. 2
a
shows an example of parallel magnetization orientations in a free ferromagnetic layer
2
and a fixed ferromagnetic layer
4
. If the magnetization orientation is parallel, a current increases.
FIG. 2
b
shows an example of anti-parallel magnetization orientations in a free ferromagnetic layer
2
and a fixed ferromagnetic layer
4
. If the magnetization orientation is anti-parallel, a current decreases.
Here, the magnetization orientation of a free ferromagnetic layer
2
is changed by an external magnetic field. An MRAM cell stores logic values of “o” and “1” according to the magnetization orientation of the free ferromagnetic layer
2
.
However, since a conventional MRAM cell includes 1T+1MTJ, the cell has the complicated structure and the difficult process. The conventional MRAM also has the problem in the cell size.
SUMMARY OF THE INVENTION
Accordingly, it is the first object of the present invention to provide an MRAM for reading/writing data from/to an MRAM cell by adjusting a current flowing in an MTJ according to the volume of voltages applied to word lines.
It is the second object of the present invention to provide an MRAM for reading data from an MRAM cell by adjusting the amount of a current flowing from a drain region to a source region, by the amount of a current flowing through an MTJ of an MRAM cell, according to the volume of voltages in word lines.
It is the third object of the present invention to provide an MRAM for reading/writing two or more data, thereby reducing a cell size of MRAM.
It is the forth object of the present invention to provide an MRAM for reading/writing two or more data, thereby performing an easy process.
It is the fifth object of the present invention to provide an MRAM for reading/writing two ore more data, thereby improving a sensing margin.
According to a first aspect of the present invention, a MRAM comprises: an MRAM cell having source and drain regions formed on an active region of a semiconductor substrate; an insulating layer deposited on a channel region of a semiconductor substrate; and an MTJ stacked on an upper portion of the insulating layer, wherein data is written/read to/from the MRAM cell by adjusting/sensing a current flowing through the MTJ in MRAM cell according to voltages applied to word lines of the MRAM cell.
According to a second aspect of the present invention, a MRAM comprises: an MRAM cell group consisting of a plurality of MRAM cells connected to each other in series between a bit line and a cell plate and having each gate connected to receive singal of a plurality of word lines; and a sense amplifier sensing data applied to the bit line when receiving a sense amplifier enable signal.
According to a third aspect of the present invention, a MRAM comprises: a first MRAM cell group consisting of a plurality of MRAM cells connected to each other in series between a bit line and a cell plate and having each gate connected to receive signals of a plurality of word lines; a second MRAM cell group consisting of a plurality of MRAM cells connected to each other in series between a bit line bar and a cell plate, and having each gate connected to receive signals of the plurality of word lines; and a sense amplifier connected between the bit line and the bit line bar, and for sensing data applied to the bit line and the bit line bar when receiving a sense amplifier enable signal.
According to a fourth aspect of the present invention, a MRAM comprises: a data detecting circuit connected to a bit line, and for converting a current flowing through an MTJ in an MRAM cell into a voltage and then detecting data based on the different magnetization orientation of the MTJ in the MRAM cell.
According to a fifth aspect of the present invention, a MRAM comprises an MRAM cell group consisting of a plurality of MRAM cells connected to each other in series between a bit line and a cell plate and having each gate connected to receive signals of a plurality of word lines; and a data detecting circuit connected to the bit line and, for converting a current flowing through

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