Magnetic random access memory

Details Magnetic random access memory Magnetic random access memory

2000-01-07

2001-01-23

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having fuse element

C365S157000, C365S158000

Reexamination Certificate

active

06178131

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates generally to integrated circuits, and more particularly, to a magnetic random access memory for use in a semiconductor integrated circuit.
Conventional non-volatile random access memory (“RAM”), such as those used on a flat-shaped or spherical-shaped semiconductor integrated circuits, is a comparatively expensive circuit to produce. For one, it typically takes from 15 to 30 mask levels to implement the complicated memory cell structure. Also, many ion implantation processes and vacuum processes are necessary, thereby requiring a very long process time. Further, memory cells (especially dynamic memory cells) tend to leak and therefore require maintenance or refreshing circuitry. Further still, memory density (e.g., the number of memory cells per unit area) is always desired to be as large as possible to reduce the size requirements and/or increase the number of memory cells in the integrated circuit.
Some attempts have been made at alternate types of high density RAM. For example, in Tehrani, S., Chen, E., Durlam, M., Zhu, T., and Goronkin, H. (1996), “High Density Nonvolatile Magnetoresistive RAM,” IEDM, IEDM 96-193 to 194, a non-volatile memory cell based on Ferro-magnetically coupled giant magneto-resistive material is disclosed. In Lyu, J S., Kim, B W., Kim, K H., Cha, J Y., Yoo, H J (1996), “Metal-Ferroelectric-Semiconductor Field-Effect Transistor (MFSFET) for Single Transistor Memory by Using Poly-Si Source/Drain and BaMgF
4
Dielectric,” IEDM, IEDM 96-503 to 506, a MFSFET with polysilicon islands as source/drain electrodes and BaMgF
4
film as a gate dielectric is disclosed. However, both of these alternatives have not achieved an optimal solution for designing and manufacturing the MRAM with minimum impact to the design and manufacturing processes.
SUMMARY
A technical advance is achieved by an improved magnetic random access memory according to the present invention. The MRAM has a low per-bit cost, but a relatively high memory density. The manufacturing process for the MRAM can be simple since it eliminates a necessary capacitor and involves only one transistor cell.
The MRAM of the present invention improves upon conventional RAM designs by memorizing a bit logic value (e.g., a “1” or “0”) by selectively magnetizing ferromagnetic material layer at or around a small magnetic intersection zone of a word line and a bit line, instead of storing the bit logic value in a capacitor or multiple-transistor circuit, as is done in conventional memory cells. In some embodiments of the present invention, a “write” and “erase” operation can be implemented by directing and reversing directions of a DC current in the bit line and the word line. A “read” operation can be done by providing an input signal and detecting a change to an output current or voltage of the signal.
In one embodiment, a multiple layer design can be implemented on a silicon substrate to implement the MRAM by appropriately arranging insulation layers, metal layers, an integrated circuit layer, and a ferromagnetic material layer. Consequently the small magnetic zone is “sandwiched” between the layers for the bit line and the word line.
The present invention achieves many advantages over traditional RAMs. For example, it shrinks the overall memory cell size to obtain high memory density. Also, due to the simplicity of the design, manufacturing costs can be reduced.


REFERENCES:
patent: 5673220 (1997-09-01), Gendlin
patent: 5946227 (1999-08-01), Nagi
Tehrani, S., et al., “High Density Nonvolatile Magnetoresistive RAM”, IEEE, IEDM 96-193, 1996, pp. 7.7.1-7.7.4.
Lyu, Jong-Son, et al., “Metal-Ferroelectric-Semiconductor Field-Effect Transistor (MFSFET) for Single Transistor Memory by Using Poly-Si Source/Drain and BaMgF4Dielectric”, IEEE, IEDM 96-503, 1996, pp. 19.3.1-19.3.4.

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