Static information storage and retrieval – Read/write circuit – Parallel read/write
Reexamination Certificate
2003-12-03
2004-12-07
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Parallel read/write
C365S233100, C365S221000, C365S236000, C365S194000, C365S189080, C365S189120
Reexamination Certificate
active
06829191
ABSTRACT:
BACKGROUND OF THE INVENTION
Magnetic random access memory (MRAM) is a type of non-volatile magnetic memory which includes magnetic memory cells. A typical magnetic memory cell includes a layer of magnetic film in which the magnetization of the magnetic film is alterable and a layer of magnetic film in which magnetization is fixed or “pinned” in a particular direction. The magnetic film having alterable magnetization is typically referred to as a data storage layer, and the magnetic film which is pinned is typically referred to as a reference layer.
A magnetic memory cell is usually written to a desired logic state by applying external magnetic fields that rotate the orientation of magnetization in its data storage layer. The logic state of a magnetic memory cell is indicated by its resistance which depends on the relative orientations of magnetization in its data storage and reference layers. The magnetization orientation of the magnetic memory cell assumes one of two stable orientations at any given time. These two stable orientations, parallel and anti-parallel, represent, for example, logic values of “0” and “1.”
Typically, the orientation of magnetization in the data storage layer aligns along an axis of the data storage layer that is commonly referred to as its easy axis. The external magnetic fields are applied to flip the orientation of magnetization in the data storage layer along its easy axis to either a parallel or anti-parallel orientation. With parallel orientation, the magnetic memory cell is in a low resistance state because the orientation of magnetization in its data storage layer is substantially parallel along the easy axis. With anti-parallel orientation, the magnetic memory cell is in a high resistance state because the orientation of magnetization in its data storage layer is substantially anti-parallel along the easy axis.
A typical magnetic memory includes an array of magnetic memory cells. Word lines extend along rows of the magnetic memory cells, and bit lines extend along columns of the magnetic memory cells. Each magnetic memory cell is located at an intersection of a word line and a bit line. A selected magnetic memory cell is usually written by applying electrical currents to the particular word and bit lines that intersect at the selected magnetic memory cell. The electrical current applied to the particular bit line generates a magnetic field substantially aligned along the easy axis of the selected magnetic memory cell. This magnetic field may be referred to as a bit line write field. An electrical current applied to the particular word line also generates a magnetic field substantially perpendicular to the easy axis of the selected magnetic memory cell. This magnetic field may be referred to as a word line write field. The sum of the bit line write field and the word line write field must be greater than a critical switching field or write threshold to enable the magnetization in the data storage layer to change and align according to the applied write fields. A selected magnetic memory cell is usually read by applying sense currents to the particular word and bit lines that intersect at the selected magnetic memory cell. The magnetic memory cell typically has a resistance of value R corresponding to one logic state or a value R+AR corresponding to a second logic state. A sense amplifier senses the resistance state of the selected magnetic memory cell to determine the logic value stored in the memory cell. The resultant logic state is stored in a data register in order to be read out of the magnetic memory.
During a read operation, data is typically read from the MRAM array as n-bit words. For example, a 16-bit word might be read from sixteen selected memory cells. With a 16-bit word, 16 sense amplifiers simultaneously sense the resistance state of the selected memory cells to determine the logic values stored in the cells. When all of the 16 sense amplifiers have completed reading the state of the selected memory cells, the logic values are typically stored in separate output registers.
One problem that can occur during highly parallel modes of operation is that not all of the sense amplifiers complete sensing the resistance state of the selected memory cells at the same time. This problem can arise because of manufacturing variations among the magnetic memory cells. For example, manufacturing variations in the dimensions or shapes or in the thicknesses or crystalline anisotropy of the data storage layers of the magnetic memory cells can cause variations across a wafer in the memory cell R and R+&Dgr;R resistance values. The result is that it becomes more time consuming to read the magnetic memory cells because the magnetic memory cell requiring the greatest amount of time to be read determines the minimum read cycle time of the magnetic memory.
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Brandenberger Sarah Morris
Perner Frederick A.
Smith Kenneth Kay
Hewlett--Packard Development Company, L.P.
Tran Andrew Q.
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