Static information storage and retrieval – Systems using particular element – Magnetoresistive
Reexamination Certificate
2001-11-06
2003-04-15
Lam, David (Department: 2818)
Static information storage and retrieval
Systems using particular element
Magnetoresistive
C365S171000, C365S173000
Reexamination Certificate
active
06549455
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a magnetic memory device, and more specifically, it relates to a magnetic memory device including a storage element exhibiting a ferromagnetic tunnel effect.
2. Description of the Prior Art
An MRAM (magnetic random access memory) is generally known as a nonvolatile memory magnetically recording data. This MRAM is disclosed in detail in Nikkei Electronics, 1999, 11.15 (No. 757), pp, 49 to 56 etc.
FIGS. 18 and 19
are schematic diagrams for illustrating the structure of a storage element
110
of the MRAM disclosed in the aforementioned literature. Referring to
FIG. 18
, the storage element
110
of the conventional MRAM comprises a ferromagnetic layer
101
, another ferromagnetic layer
103
and a nonmagnetic layer
102
arranged between the ferromagnetic layers
101
and
103
.
The ferromagnetic layer
101
is harder to invert than the ferromagnetic layer
103
. A substance exhibiting ferromagnetism, which is magnetism provided by magnetic atoms or free atoms of a metal arranging magnetic moments in parallel with each other by positive exchange interaction for forming spontaneous magnetization, is referred to as a ferromagnetic substance. The ferromagnetic layers
101
and
103
consist of such a ferromagnetic substance. In general, a GMR (giant magnetoresistance) film employing a metal is applied to the nonmagnetic layer
102
. Recently, a TMR (tunneling magnetoresistance) film employing an insulator is developed for the nonmagnetic layer
102
. The TMR film advantageously has larger resistance than the GMR film. More specifically, the MR ratio (rate of resistance change) of the GMR film is at the level of 10%, while that of the TMR film is at least 20%. The storage element
110
consisting of the TMR film is hereinafter referred to as a TMR element
110
.
The principle of storage of the conventional MRAM employing the TMR element
110
is now described with reference to
FIGS. 18 and 19
. Such a state that the two ferromagnetic layers
101
and
103
are magnetized in the same direction (parallel) is associated with data “0”, as shown in FIG.
18
. Such a state that the two ferromagnetic layers
101
and
103
are magnetized in opposite directions (antiparallel) is associated with data “1”, as shown in FIG.
19
. The TMR element
110
exhibits small resistance (R
0
) when magnetized in the parallel direction, while exhibiting large resistance (R
1
) when magnetized in the antiparallel directions. The data “0” and “1” are distinguished from each other through this property of the TMR element
110
having the resistance varying with the directions of magnetization.
FIG. 20
is a block diagram showing the overall structure of a conventional MRAM
150
having memory cells each formed by a single TMR element and a single transistor. The structure of the conventional MRAM
150
is now described with reference to FIG.
20
.
A memory cell array
151
is formed by a plurality of memory cells
120
arranged in the form of a matrix (
FIG. 20
shows only four memory cells
120
for simplifying the illustration). Each memory cell
120
is formed by a TMR element
110
and an NMOS transistor
111
.
In the memory cells
120
arranged in a row direction, gates of the NMOS transistors
111
are connected to common read word lines RWL
1
to RWL
n
. In the memory cells
120
arranged in the row direction, further, rewrite word lines WWL
1
to WWL
n
are arranged on first ferromagnetic layers of the TMR elements
110
.
In the memory cells
120
arranged in a column direction, first ferromagnetic layers of the TMR elements
110
are connected to common bit lines BL
1
to BL
n
.
The read word lines RWL
1
to RWL
n
are connected to a row decoder
152
, and the bit lines BL
1
, to BL
n
are connected to a column decoder
153
.
Externally specified row and column addresses are input in an address pin
154
. The row and column addresses are transferred from the address pin
154
to an address latch
155
. In the addresses latched by the address latch
155
, the row address is transferred to the row decoder
152
through an address buffer
156
, while the column address is transferred to the column decoder
153
through the address buffer
156
.
The row decoder
152
selects a read word line RWL corresponding to the row address latched by the address latch
155
from the read word lines RWL
1
to RWL
n
while selecting a rewrite word line WWL corresponding to the row address latched by the address latch
155
from the rewrite word lines WWL
1
to WWL
n
. Further, the row decoder
152
controls the potentials of the read word lines RWL
1
to RWL
n
and the rewrite word lines WWL
1
to WWL
n
on the basis of a signal from a voltage control circuit
157
.
The column decoder
153
selects a bit line BL corresponding to the column address latched by the address latch
155
from the bit lines BL
1
to BL
n
, while controlling the potentials of the bit lines BL
1
to BL
n
on the basis of a signal from another voltage control circuit
158
.
Externally specified data is input in a data pin
159
. This data is transferred from the data pin
159
to the column decoder
153
through an input buffer
160
. The column decoder
153
controls the potentials of the bit lines BL
1
to BL
n
in correspondence to the data.
Data read from an arbitrary memory cell
120
is transferred from the bit lines BL
1
to BL
n
to a sense amplifier group
161
through the column decoder
153
. The sense amplifier group
161
is formed by current sense amplifiers. The data determined by the sense amplifier group
161
is output from an output buffer
162
through the data pin
159
.
A control core circuit
163
controls the operations of the aforementioned circuits
152
to
162
.
A write (rewrite) operation and a read operation of the conventional MRAM
150
having the aforementioned structure are now described.
(Write Operation)
In the write operation, orthogonal currents are fed to the selected rewrite word line WWL and the selected bit line BL. Thus, only the TMR element
110
arranged on the intersection between the bit line BL and the rewrite word line WWL can be rewritten. More specifically, the currents flowing to the rewrite word line WWL and the bit line BL generate magnetic fields, so that the sum (composite field) of the two magnetic fields acts on the TMR element
110
. The direction of magnetization of the TMR element
110
is inverted from “1” to “0”, for example, due to the composite field.
The remaining TMR elements
110
include those fed with no currents and those only unidirectionally fed with currents. In the TMR elements
110
fed with no currents, no magnetic fields are generated and hence the directions of magnetization remain unchanged. In the TMR elements
110
only unidirectionally fed with currents, the magnitudes of generated magnetic fields are insufficient for inverting the directions of magnetization. Therefore, the directions of magnetization remain unchanged also in the TMR elements
110
only unidirectionally fed with currents.
As hereinabove described, the direction of magnetization of the TMR element
110
located on the intersection between the bit line BL and the rewrite word lines WWL corresponding to the selected address can be changed to that shown in
FIG. 18
or
19
by feeding currents to the selected bit line BL and the selected rewrite word line WWL. Thus, the data “0” or “1” can be written.
Read Operation
In order to read the data written in the aforementioned manner, a voltage is applied to the read word line RWL for rendering the NMOS transistor
111
conductive. In this state, a determination is made as to whether or not the value of a current flowing to the bit line BL is larger than a reference current value, thereby determining “1” or “0”.
In this case, the data “0” shown in
FIG. 18
exhibits a small resistance value (R
0
) due to the parallel direction of magnetization. Therefore, the value of the current flowing to the bit line BL is larger than the reference current value. On the other h
Arent Fox Kintner & Plotkin & Kahn, PLLC
Lam David
LandOfFree
Magnetic memory device including storage element exhibiting... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Magnetic memory device including storage element exhibiting..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Magnetic memory device including storage element exhibiting... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3026047