Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2005-09-27
2005-09-27
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S173000, C365S171000, C365S158000, C365S226000
Reexamination Certificate
active
06950369
ABSTRACT:
A plurality of word lines (WL1) are provided in parallel to one another and a plurality of bit lines (BL1) are provided in parallel to one another, intersecting the word lines (WL1) thereabove. MRAM cells (MC2) are formed at intersections of the word lines and the bit lines therebetween. MRAM cells (MC3) are provided so that an easy axis indicated by the arrow has an angle of 45 degrees with respect to the bit lines and the word lines. Thus, an MRAM capable of cutting the power consumption in writing is achieved and further an MRAM capable of reducing the time required for erasing and writing operations is achieved.
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Eikyu Katsumi
Kunikiyo Tatsuya
McDermott Will & Emery LLP
Mitsubishi Denki & Kabushiki Kaisha
Tran Andrew Q.
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