Magnetic memory device

Details Magnetic memory device Magnetic memory device

2002-05-30

2004-11-23

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Systems using particular element

Magnetoresistive

C365S157000, C365S171000

Reexamination Certificate

active

06822895

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a magnetic memory device, and more specifically, it relates to a magnetic memory device including a storage element exhibiting ferromagnetic tunneling.
2. Description of the Background Art
An MRAM (magnetic random access memory), which is a nonvolatile memory recording data through magnetism is known in general. This MRAM is disclosed in detail in Nikkei Electronics, 1999. 11. 15 (No. 757), pp. 49-56 or the like.
FIGS. 9 and 10
are schematic diagrams for illustrating the structure of a storage element
110
of the MRAM disclosed in the aforementioned literature. Referring to
FIG. 9
, the storage element
110
of the conventional MRAM comprises a ferromagnetic layer
101
, another ferromagnetic layer
103
and a nonmagnetic layer
102
arranged between the ferromagnetic layers
101
and
103
.
The ferromagnetic layer
101
is harder to invert than the ferromagnetic layer
103
. The term “ferromagnetism” indicates magnetism in a case where magnetic atoms or free atoms of a metal orientate magnetic moments in parallel with each other by positive exchange interaction to form spontaneous magnetization, and a substance exhibiting this ferromagnetism is referred to as a ferromagnetic substance. The ferromagnetic layers
101
and
103
consist of such ferromagnetic substances. In general, a GMR (giant magnetoresistance) film employing a metal is employed as the nonmagnetic layer
102
. A TMR (tunneling magnetoresistance) film employing an insulator is recently developed as the nonmagnetic layer
102
. This TMR film advantageously has higher resistance than the GMR film. More specifically, the MR ratio (the rate of change of resistance) of the GMR film is in the 10% level, while that of the TMR film is at least 20%. The storage element
110
consisting of the TMR film is hereinafter referred to as a TMR element
110
.
The storage principle of the conventional MRAM employing the TMR element
110
is now described with reference to
FIGS. 9 and 10
. As shown in
FIG. 9
, the state where the two ferromagnetic layers
101
and
103
are magnetized in the same direction (parallel) is associated with data “0”. As shown in
FIG. 10
, the state where the two ferromagnetic layers
101
and
103
are magnetized in the opposite directions (antiparallel) is associated with data “1”. The TMR element
110
exhibits small resistance (R
0
) when the directions of magnetization are parallel, while exhibiting large resistance (R
1
) when the directions of magnetization are antiparallel. “0” or “1” is determined through the resistance of the TMR element
110
varying with the parallel or antiparallel directions of magnetization.
FIG. 11
is a block diagram showing the overall structure of a conventional MRAM
150
having memory cells each formed by a TMR element and a transistor. The structure of the conventional MRAM
150
is now described with reference to FIG.
11
.
A memory cell array
151
is formed by arranging a plurality of memory cells
120
in the form of a matrix (
FIG. 11
shows only four memory cells
120
for simplifying the illustration). Each memory cell
120
is formed by a TMR element
110
and an NMOS transistor
111
.
In the memory cells
120
arranged in a row direction, the gates of the NMOS transistors
111
are connected to common read word lines RWL
a
to RWL
n
. In the memory cells
120
arranged in the row direction, further, rewrite word lines WWL
a
to WWL
n
are arranged on first ferromagnetic layers of the TMR elements
110
.
In the memory cells
120
arranged in a column direction, first ferromagnetic layers of the TMR elements
110
are connected to common bit lines BL
a
to BL
n
.
The read word lines RWL
a
to RWL
n
are connected to a row decoder
152
, while the bit lines BL
a
to BL
n
are connected to a column decoder
153
.
Externally specified row and column addresses are input in an address pin
154
, and transferred from the address pin
154
to an address latch
155
. In the addresses latched by the address latch
155
, the row address is transferred to the row decoder
152
through an address buffer
156
, and the column address is transferred to the column decoder
153
through the address buffer
156
.
The row decoder
152
selects a read word line RWL corresponding to the row address latched by the address latch
155
from the read word lines RWL
a
to RWL
n
, while selecting a rewrite word line WWL corresponding to the row address latched by the address latch
155
from the rewrite word lines WWL
a
to WWL
n
. The row decoder
152
further controls the potentials of the read word lines RWL
a
to RWL
n
and the potentials of the rewrite word lines WWL
a
to WWL
n
on the basis of a signal from a voltage control circuit
157
.
The column decoder
153
selects a bit line BL corresponding to the column address latched by the address latch
155
from the bit lines BL
a
to BL
n
, while controlling the potentials of the bit lines BL
a
to BL
n
on the basis of a signal from another voltage control circuit
158
.
Externally specified data is input in a data pin
159
and transferred from the data pin
159
to the column decoder
153
through an input buffer
160
. The column decoder
153
controls the potentials of the bit lines BL
a
to BL
n
in correspondence to the data.
Data read from an arbitrary memory cell
120
is transferred from any of the bit lines BL
a
to BL
n
to a sense amplifier group
161
through the column decoder
153
. The sense amplifier group
161
is formed by current sense amplifiers. The data determined by the sense amplifier group
161
is output from an output buffer
162
through the data pin
159
.
A control core circuit
163
controls operations of the aforementioned circuits
152
to
162
.
Write (rewrite) and read operations of the conventional MRAM
150
having the aforementioned structure are now described.
Write Operation
In the write operation, orthogonal currents are fed to the selected rewrite word line WWL and the selected bit line BL. Thus, data can be rewritten only in the TMR element
110
located on the intersection between the bit line BL and the rewrite word line WWL. More specifically, the currents flowing through the rewrite word line WWL and the bit line BL generate magnetic fields, and the sum (combined magnetic field) of the two magnetic fields acts on the TMR element
110
. This combined magnetic field inverts the directions of magnetization of the TMR element
110
from “1” to “0”, for example.
The TMR elements
110
located on positions other than the aforementioned intersection include those fed with no currents and those only unidirectionally fed with currents. In each TMR element
110
fed with no current, no magnetic field is generated and hence the directions of magnetization remain unchanged. In each TMR element
110
only unidirectionally fed with a current, a magnetic field is generated in a magnitude insufficient for inverting the directions of magnetization. Therefore, the directions of magnetization remain unchanged in the TMR element
110
only unidirectionally fed with a current.
As hereinabove described, the directions of magnetization of the TMR element
110
located on the interposition between the selected bit line BL and the selected rewrite word line WWL can be changed as shown in
FIG. 9
or
10
by feeding currents to the bit line BL and the rewrite word line WWL corresponding to the selected address. Thus, the data “0” or “1” can be written.
Read Operation
In order to read the data written in the aforementioned manner, a voltage is applied to the read word line RWL for rendering the NMOS transistor
111
conductive. In this state, determination is made as to whether or not the value of a current flowing through the bit line BL is larger than a reference current value, thereby determining “1” or “0”.
In this case, the directions of magnetization are parallel in the case of the data “0” shown in
FIG. 9
, and hence the resistance value (R
0
) is small. Therefore, the value of the current flowing through

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