Magnetic memory cell sensing with first and second currents

Details Magnetic memory cell sensing with first and second currents Magnetic memory cell sensing with first and second currents

2003-06-02

2004-11-30

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Including signal comparison

C365S149000, C365S171000

Reexamination Certificate

active

06826094

ABSTRACT:

THE FIELD OF THE INVENTION
The present invention generally relates to the field of magnetic memories. More particularly, the present invention relates to sensing a logic state stored in a magnetic memory cell with first and second currents.
BACKGROUND OF THE INVENTION
Magnetic random access memory (MRAM) is a type of non-volatile magnetic memory which includes magnetic memory cells. A typical magnetic memory cell includes a layer of magnetic film in which the magnetization of the magnetic film is alterable and a layer of magnetic film in which magnetization is fixed or “pinned” in a particular direction. The magnetic film having alterable magnetization is typically referred to as a data storage layer, and the magnetic film which is pinned is typically referred to as a reference layer.
A typical magnetic memory includes an array of magnetic memory cells. Word lines extend along rows of the magnetic memory cells, and bit lines extend along columns of the magnetic memory cells. Each magnetic memory cell is located at an intersection of a word line and a bit line. A magnetic memory cell is usually written to a desired logic state by applying external magnetic fields that rotate the orientation of magnetization in its data storage layer. The logic state of a magnetic memory cell is indicated by its resistance which depends on the relative orientations of magnetization in its data storage and reference layers. The magnetization orientation of the magnetic memory cell assumes one of two stable orientations at any given time. These two stable orientations are referred to as “parallel” and “anti-parallel” orientations. With parallel orientation, the orientation of magnetization in the data storage layer is substantially parallel to the magnetization in the reference layer along the easy axis and the magnetic memory cell is in a low resistance state which can be represented by the value R. With anti-parallel orientation, the orientation of magnetization in the data storage layer is substantially anti-parallel to the magnetization in the reference layer along the easy axis and the magnetic memory cell is in a high resistance state which can be represented by the value R+&Dgr;R. A sense amplifier can be used to sense the resistance state of a selected magnetic memory cell to determine the logic state stored in the memory cell.
Sensing the resistance state of selected magnetic memory cells can be unreliable. Manufacturing variations in the dimensions or shapes or in the thicknesses or crystalline anisotropy of the data storage layers of the magnetic memory cells can cause variations across a wafer in the memory cell R and R+&Dgr;R resistance values. Variations in operating conditions of the magnetic memories such as temperature can also cause variations in the memory cell R and R+&Dgr;R resistance values.
SUMMARY OF THE INVENTION
One embodiment of the present invention provides a magnetic memory that includes a memory cell and a sense amplifier coupled to the memory cell. The sense amplifier comprises a capacitor operative between a first voltage established by a first sense current flowing in a first direction and a second voltage established by a second sense current flowing in a second direction. The first sense current corresponds to an unknown logic state of the memory cell and the second sense current corresponds to a known logic state of the memory cell. The sense amplifier also comprises detect logic configured to compare the second voltage to an upper and lower threshold voltage and provide the known logic state if the second voltage is less than the upper threshold voltage and greater than the lower threshold voltage, and provide a logic state opposite to the known logic state if the second voltage is equal to or greater than the upper threshold voltage or is equal to or less than the lower threshold voltage.


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