Magnetic memory array with an improved world line configuration

Details Magnetic memory array with an improved world line configuration Magnetic memory array with an improved world line configuration

2006-08-22

2006-08-22

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Magnetoresistive

C365S145000, C365S171000

Reexamination Certificate

active

07095647

ABSTRACT:
A magnetic memory array with an improved word line configuration is provided. In some embodiments, the magnetic memory array may be adapted to selectively supply voltage from a single source line to one or more transistors arranged within a first row of the magnetic memory array and to one or more transistors arranged within a second row of the magnetic memory array. In addition or alternatively, the magnetic memory array may be configured to enable current flow along a single current path through a magnetic junction and along multiple paths extending from the single current path to a plurality of transistors. In some embodiments, the plurality of transistors may be formed from a contiguous conductive structure comprising the word line. In some cases, the word line may be configured to include at least two transistors that share a common diffusion region.

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