Magnetic field effect transistor, latch and method

Details Magnetic field effect transistor, latch and method Magnetic field effect transistor, latch and method

2007-04-03

2007-04-03

Pizarro, Marcos D. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Magnetic field

C257S252000, C257S366000, C257SE29323

Reexamination Certificate

active

10729859

ABSTRACT:
A split drain magnetic field effect transistor (MAGFET) includes at least one supplemental gate to exert a lateral electrical field in the channel of the MAGFET. Connection of the supplemental gate in feedback with one of the two drain contacts allows the MAGFET to act as a latch sensitive to the presence of an external magnetic field. Preferably, the MAGFET includes two laterally spaced supplemental gates, allowing for the detection of an external magnetic field and its orientation.

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Li, Z. et al., “A CMOS Magnetic Latch with Extremely High Resolution”, IEDM 2002, Tech. Digest, pp. 909-912.
Li, Z. et al., “Weak Magnetic Field Pattern Detection by CMOS Magnetic Latch”, IEEE, 2003.

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