Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1998-07-13
2000-02-01
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
438723, 438732, 438743, H01L 2100
Patent
active
060202688
ABSTRACT:
In this invention is described a process for controlling the etching of side wall spacers to a prescribed width. A gaseous mixture of an inert gas, CF.sub.4 and CHF.sub.3 in a prescribed ratio, under pressure and with a plasma is flowed within a RIE chamber. A magnetic field in parallel with the surface of the wafer being etched is used to control the oxide/silicon selectivity. The shape and width of the side wall spacers are controlled by controlling the selectivity. Uniformity of the shape of side wall spacers over the surface of a wafer is also produced by the magnetic field which induces a higher etch rate at the edge of the wafer where the oxide coating is the thickest.
REFERENCES:
patent: 4786361 (1988-11-01), Sekine et al.
patent: 5021121 (1991-06-01), Groechel et al.
patent: 5242538 (1993-09-01), Hamrah et al.
Chang et al. "ULSI Technology ". The McGraw-Hill Companies Inc, 1996. p346-349.
Ackerman Stephen B.
Powell William
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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