Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2005-11-17
2008-09-23
Thai, Tuan V. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S100000, C711S111000, C711S112000, C711S154000
Reexamination Certificate
active
07428612
ABSTRACT:
Embodiments of the invention reduce the time required to execute an erase command received from the host device and thereby reduce the time that the interface bus to the host device must spend for the command. In one embodiment, a host issues an erase command. Upon receiving the command, a control processor (MPU) registers address information on the area(s) to be erased in a table in a data buffer. Then, the magnetic disk drive copies the table to a dedicated area of a disk medium or a dedicated area of separately provided nonvolatile memory in order to hold and use the table even after the drive is restarted after a shutdown. After storing the address information on the area(s) to be erased into the table, the control processor (MPU) causes a hard disk controller (HDC) to send an erase command completion notification to the host.
REFERENCES:
patent: 06282944 (1994-07-01), None
patent: 06-282944 (1994-10-01), None
patent: 11-238319 (1999-08-01), None
Duncan Patrick
Hitachi Global Storage Technologies - Netherlands B.V.
Thai Tuan V.
Townsend and Townsend / and Crew LLP
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