Macroinstruction execution in a microprogram-controlled processo

Details Macroinstruction execution in a microprogram-controlled processo Macroinstruction execution in a microprogram-controlled processo

1983-06-02

1986-12-23

Thomas, James D.

Boots, shoes, and leggings

G06F 922, G06F 940

Patent

active

046316639

ABSTRACT:
In a microprogram-controlled processor, having an additional operating mode in which particular functions can be executed under direct hardware control, a mode latch signals whether microprogram instructions or directly controlled macro instructions are to be executed. The macroprogram instructions are conventionally executed. For the execution of directly controlled macro instructions, a control storage supplies a hardware control word associated with the macro instruction to be directly executed. The hardware control word contains a mode control bit for signalling that the direct hardware control mode is to be executed. The remainder of the hardware control word contains a plurality of direct control bits, each of which directly controls a hardware function. In an alternative embodiment multiple hardware control words are employed.

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IBM Technical Disclosure Bulletin, vol. 9, No. 7, Dec. 1966, "Double Usage of Read-Only Storage", to J. F. Kevill, p. 796.
IBM Technical Disclosure Bulletin, vol. 14, No. 1, Jun. 1971, "Combined Macro/Micro Program Machine", to M. Faix et al, p. 298.
IBM Technical Disclosure Bulletin, vol. 16, No. 4, Sep. 1973, "Read-Only Storage Control for High-Speed Instruction Execution", to D. K. Hardin, pp. 1106-1108.

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