Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-08-22
2006-08-22
Whitmore, Stacy A. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C707S793000, C711S004000
Reexamination Certificate
active
07096436
ABSTRACT:
Macro design techniques are disclosed for facilitating subsequent stage wiring across the macro. Whitespace areas within the macro are rearranged to accommodate the wiring. The rearrangement may take the form of physical rearrangement of the whitespace areas into routing tracks extending from one side of the macro to another; shielding using, for example, macro power bussing and/or macro wiring; routing power busses to the rearranged whitespace; and/or inserting active circuits with pins accessible to the wiring. In a preferred embodiment, active circuits are placed into rearranged macro whitespace during the design of subsequent stages. The rearrangement of the whitespace facilitates the wiring across the macro so that slew rate and path delay requirements of the subsequent stage wiring can be maintained, without excessive buffering or rerouting of wiring.
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Bednar Thomas R.
Dunn Paul E.
Gould Scott W.
Panner Jeannie H.
Zuchowski Paul S.
Heslin Rothenberg Farley & & Mesiti P.C.
Kotulak, Esq. Richard M.
Radigan, Esq. Kevin P.
Whitmore Stacy A.
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