Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2000-09-20
2003-02-25
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
06526560
ABSTRACT:
PRIORITY CLAIM
This patent application claims priority of Japanese Patent Application No. 11-267393, filed Sep. 21, 1999 and of Japanese Patent Application No. 2000-285328, filed Sep. 20, 2000.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a macro-cell-creating method, macro-cell-creating apparatus, and the like, and more particularly, to a macro-cell-creating method, comprising a basic logical circuit (hereinafter referred to as a “basic function cell”) such as a NAND gate, flip-flop, inverter, and the like, in an ASIC (Application Specific Integrated Circuit) such as a gate array, standard cell, embedded array, and the like, and the macro-cell-creating apparatus and the like.
2. Description of the Related Art
Recently, an ASIC which realizes an IC (Integrated Circuit) for a specific application is actively developed. The ASIC is composed of a combination of a plurality of macro cells, each thereof being a circuit unit having a fixed function. The macro cell is composed of a combination of a plurality of basic function cells, each thereof being a basic element of a logical circuit. In recent years, with propagation of the ASIC, a circuit scale of the ASIC is rapidly increased, and a circuit scale of the macro cell, comprising the ASIC, is also increased.
On the other hand, the ASIC is required to be developed more efficiently in a shorter time. Accordingly, efficient designing of a macro cell, namely, efficient disposition and wiring of a plurality of basic function cells become important.
FIG. 6
is a flowchart showing a conventional macro-cell-creating method, and
FIG. 7
is a schematic plan view showing a macro cell
600
created by the conventional macro-cell-creating method.
The macro cell
600
comprises, as shown in
FIG. 7
, a plurality of basic function cells such as basic function cells
611
to
613
,
621
to
623
,
631
to
633
, and the like, and the basic function cells
611
to
613
,
621
to
623
, and
631
to
633
are provided with input/output terminals
641
to
649
of the macro cell
600
, respectively. Furthermore, from the input/output terminals
641
to
649
of the macro cell
600
, wiring lines
651
to
659
are provided for drawing out the input/output terminals
641
to
649
thereof onto the outside of the macro cell
600
, respectively.
Now, a conventional macro-cell-creating method is described. As shown in
FIG. 6
, firstly, circuit connection information
511
showing connection states among the basic function cells, a size estimate
512
of a circuit of the desired macro cell
600
, and input/output terminal information
513
of a circuit of the macro cell
600
are previously prepared, and these are stored in a storage medium or the like (step S
500
).
Then, based on the size estimate
512
of the circuit of the macro cell
600
, a frame of the macro cell
600
is created (step S
501
).
Then, the circuit connection information
511
about the basic function cells included in the macro cell
600
is consulted, and all basic function cells including the basic function cells
611
to
613
,
621
to
623
,
631
to
633
, and the like are disposed within the frame of the macro cell
600
created in step S
501
(step S
502
).
Then, all of the basic function cells including basic function cells
611
to
613
,
621
to
623
,
631
to
633
, and the like, disposed on the macro cell
600
in step S
502
, are wired (step S
503
).
Then, the input/output terminal information
513
of the circuit of the macro cell is consulted, then wiring lines
651
to
659
are wired for drawing out the input/output terminals
641
to
649
of the macro cell
600
created in step S
503
to the outside of macro cell
600
, and macro cell layout data
514
are created (step S
504
).
However, according to the conventional macro-cell-creating method as shown in
FIG. 6
, when basic function cells are disposed on a macro cell, only the circuit connection information about the basic function cells is consulted at the disposition, and accordingly the wiring for drawing out the input/output terminals of the macro cell to the outside of the macro cell becomes more complicated as well as longer, thereby causing a problem that operation speed of the macro cell is lowered.
Further, when creating a macro cell, calculation of the delay values regarding input/output terminals of the macro cell is necessitated, however, according to the conventional macro-cell-creating method, since the input/output terminals of the macro cell are drawn out to the outside of the macro cell by draw-out wiring, the delay values regarding the input/output terminals of the macro cell are to be calculated from the delay values up to the input/output terminals and the delay values of the wiring for drawing out the input/output terminals to the outside of the macro cell. Accordingly, the calculation of the delay values regarding the input/output terminals of the macro cell becomes complicated, thereby causing a problem that the accurate calculation of the delay values is difficult.
SUMMARY OF THE INVENTION
Thereupon, in view of the above-described problems, aspects of the present invention can provide a macro-cell-creating method capable of accurately calculating the delay values regarding the input/output terminals of the macro cell and capable of efficiently designing a high-speed macro cell, even if a circuit scale of the macro cell is increased.
Further, aspects of the present invention can provide a library of a macro cell layout data, capable of calculating a wiring delay time accompanied to mutual connection of the macro cells on the integrated circuit level, thereby contributing to shortening of designing time and facilitation of the designing, when an integrated circuit is designed by use of a plurality of macro cells.
Furthermore, aspects of the present invention can provide a macro-cell-creating apparatus for realizing the above described aspects.
Moreover, other aspects of the present invention can provide a recording medium which is necessitated when the macro-cell-creating method is realized by a computer.
In order to solve the above-described problems, a macro-cell-creating method is constituted as follows.
That is, the macro-cell-creating method of the present invention is a macro-cell-creating method for creating a desired macro cell based on a plurality of basic function cells respectively provided with a fixed function, and is characterized by comprising a first step for creating a frame of the macro cell based on a size estimate of the desired macro cell, a second step for disposing provisional external input/output terminals for drawing out input/output terminals of the basic function cells onto the frame of the macro cell, based on input/output terminal information of the macro cell circuit, a third step for consulting with connection information between the provisional external input/output terminals and input/output terminals of the basic function cells, in addition to circuit connection information about the basic function cells, to dispose the plurality of basic function cells inside the macro cell, and for wiring between the disposed plurality of basic function cells, and a fourth step for deleting wired lines between said provisional external input/output terminals and the input/output terminals of the basic function cells out of the wired lines.
In this way, in the macro-cell-creating methods described above, provisional external input/output terminals are previously provided on the frame of the macro cell, and the connection information of the provisional external input/output terminals is added to the circuit connection information about the basic function cells. Accordingly, the basic function cells actually having input/output terminals can be disposed at positions close to the provisional external input/output terminals.
Furthermore, in the macro-cell-creating methods described above, draw-out wiring lines connecting the input/output terminals of the basic function cells with the provisional external input/output terminals
Liu Andrea
Smith Matthew
LandOfFree
Macro cell creating method, apparatus and library thereof,... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Macro cell creating method, apparatus and library thereof,..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Macro cell creating method, apparatus and library thereof,... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3168311