LVDS current steering input buffer

Details LVDS current steering input buffer LVDS current steering input buffer

2001-08-23

2003-03-04

Chang, Daniel D. (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S027000, C330S253000, C327S053000

Reexamination Certificate

active

06529043

ABSTRACT:

FIELD OF THE INVENTION
The present invention is related to electronic circuits, and more specifically to a current steering circuit for use with an LVDS input buffer.
BACKGROUND OF THE INVENTION
Differential signaling has been in existence for many years. For example, teletypes were some of the first equipment to use differential signaling to communicate. Electronic devices (i.e. computers) often communicate between ports by means of Low Voltage Differential Signaling (LVDS) driver and receiver pairs.
LVDS is a differential signaling technique commonly used in data transmission systems. A low voltage differential signal produced by a line driver typically has peak-to-peak amplitudes in the range from 250 mV to 450 mV. The low voltage swing minimizes power dissipation, while maintaining high transmission speeds. Typical transmission speeds are over 100 Mbps (Mega-bits per second).
LVDS input buffers are designed to receive a wide variety of input signals while producing a fairly constant output signal. The input signals received by the LVDS input buffers may vary in frequency, peak-to-peak voltage, as well as common-mode voltage. Some LVDS input buffers, however, generate jitter that may cause problems within the LVDS system.
SUMMARY OF THE INVENTION
The present invention is directed to providing a method and apparatus for current steering for an LVDS input buffer. The current steering helps to flatten the differential current between the respective differential devices included in the LVDS input buffer.
According to one aspect of the invention, a current steering circuit is configured to steer current to a first node and/or a second node in response to a comparison between the input common-mode signal and a reference signal.
According to another aspect of the invention, during high input common-mode, more current is steered to the P-channel differential pair node of the input buffer as compared to the N-channel differential pair node.
According to yet another aspect of the invention, during low input common-mode, more current is steered to the N-channel differential pair node of the input buffer as compared to the P-channel differential pair node.
According to still yet another aspect of the invention, the current steering circuit helps to reduce jitter and achieve stable output of the input buffer over process, voltage and temperature changes.
According to another aspect of the invention, the method and apparatus provided helps to ensure a stabilized summation of the currents I
D1
+I
D3
and I
D2
+I
D4
by steering current into the P-channel node or N-channel node.


REFERENCES:
patent: 4555673 (1985-11-01), Huijsing et al.
patent: 5371474 (1994-12-01), Wassenaar et al.
patent: 5734297 (1998-03-01), Huijsing et al.
patent: 6194962 (2001-02-01), Chen

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