LSI inspection method and defect inspection data analysis...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Reexamination Certificate

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11517046

ABSTRACT:
The present invention provides an LSI inspection method and a defect inspection data analysis apparatus capable of shortening a time needed for a wafer test. In a first database11is stored inspection data obtained when each defect inspection apparatus20inspects a wafer for defects in the front-end process. In a second database12are stored non-conforming article judgment criteria for each predetermined type of defect, according to which a non-conforming chip is judged. A defective chip identifying portion16identifies a chip having a defect and identifies the type of defect for each defect that the identified chip has, on the basis of the inspection data. For each identified chip, a non-conforming chip judging portion17judges whether the chip is a non-conforming article or not according to the non-conforming article judgment criteria corresponding to the type of defect for each defect, and obtains position information within the wafer surface of a chip judged as being a non-conforming article. The position information thus obtained is transmitted to an LSI inspection apparatus30via a transmission portion15.

REFERENCES:
patent: 5391985 (1995-02-01), Henley
patent: 6087673 (2000-07-01), Shishido et al.
patent: 6939727 (2005-09-01), Allen et al.
patent: 7013107 (2006-03-01), Russel et al.
patent: 2003/0007677 (2003-01-01), Hiroi et al.
patent: WO97/43656 (1997-11-01), None
patent: PCT 2001-526833 (2001-12-01), None

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