Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-08-14
2007-08-14
Do, Thuan V. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
11014814
ABSTRACT:
An LSI design method according to the present invention is to estimate a timing uncertainty in an early stage of design for each item of which an influence on timing is uncertain among respective items requiring consideration relating to establishment of timing; and define a timing margin in each design stage by using the timing uncertainty estimation result depending on whether or not an influence of the each item on timing has been determined, followed by proceeding with the design in the respective design stages accordingly. As such, according to the present invention, a timing uncertainty is estimated in an early stage of LSI design, followed by proceeding with the design by using the timing uncertainty as required.
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Hosono Toshikatsu
Yoneda Takashi
Do Thuan V.
Fujitsu Limited
Levin Naum B.
Staas & Halsey , LLP
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