Electronic digital logic circuitry – Multifunctional or programmable – Array
Patent
1996-04-22
1998-09-08
Westin, Edward P.
Electronic digital logic circuitry
Multifunctional or programmable
Array
326 46, 326 82, 326 37, 377 76, H03K 19173, H03K 1908
Patent
active
058049878
ABSTRACT:
An LSI chip is mounted on an LSI board. Sub-buffer circuit areas where input buffers, output buffers or input/output buffers are to be formed are provided in signal lines extending from the pad to the internal circuit of the LSI chip. Each sub-buffer circuit area has a plurality of basic elements, such as transistors and resistors, connected in parallel to one another so that different combinations of those elements can be selected by switches. A latch controller is incorporated in the LSI chip, and it has latch circuits serially connected to form a shift register structure. This latch controller sends a program signal for determining the buffer circuit characteristic to the sub-buffer circuit areas. This program signal is generated when program data is input to the latch controller. The program data is given serially via input buffers from the pads on the LSI chip. The latch controller transfers the program data to the latch circuits one after another in synchronism with a clock signal. Those pads connected to the output buffers become signal extending terminals to another circuit.
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Ogawa Kyohsuke
Tanaka Yasunori
Kabushiki Kaisha Toshiba
Santamauro Jon
Westin Edward P.
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