LSI apparatus

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C710S008000

Reexamination Certificate

active

07395520

ABSTRACT:
Disclosed herein is an LSI apparatus having a CPU and a plurality of functional blocks for controlling an external equipment, the plurality of functional blocks sharing one external terminal connected to the external equipment, including: a mode register having a flag information set by the CPU indicating validity or invalidity of each functional block; a selector for switching the connection between each functional block and the external terminal; and a switch controller retaining a priority sequence among each functional block, for controlling switching of the selector based on the priority sequence and the flag information set at the mode register.

REFERENCES:
patent: 6366975 (2002-04-01), Nakajima
patent: 6501300 (2002-12-01), Hatae
patent: 6789135 (2004-09-01), Yamamoto et al.
patent: 7076745 (2006-07-01), Togo
patent: 2002/0026553 (2002-02-01), Saito
patent: 8-204128 (1996-08-01), None

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