Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral adapting
Utility Patent
1998-11-05
2001-01-02
Thai, Xuan M. (Department: 2781)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral adapting
C710S108000, C710S120000
Utility Patent
active
06170027
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a bridge and its bridging method, and in particular, to an LPC/ISA bridge for bridging an LPC interface to an ISA interface.
2. Description of the Related Art
Presently, many IBM-compatible computers still choose ISA interfaces for their expansion cards, for example a super-I/O card having therein a floppy controller, a keyboard controller, a parallel/serial port, etc. However, with the development of computer system techniques, the ISA interface is no longer sufficient to make the best of new computer systems, regardless of the operating speed or controllability.
Therefore, several companies have tried to provide new interfaces to replace the ISA interface. As an example, Intel Corp. has disclosed a low pin count (LPC) interface to replace the ISA interface. The LPC interface is superior in several features. For instance, the LPC interface transmits address and data signals serially, so the number of pins needed can be greatly reduced. In general, the number of pins needed in the LPC interface is less than that in the ISA interface by about 30. As a result, the layout complexity and the limitation on the integration multiple functions on the same IC (that is, the number of pins) are both lessened. Furthermore, the LPC interface operates at a clock frequency of 33 MHz, as a result, the transmission speed is not lowered even though the address and data signals are serially transmitted. Consequently, the LPC interface stands a good chance to replace the ISA interface, taking both market (because the chipset provided by Intel Corp. will support the LPC interface) and technology into account.
However, as the ISA interface is a highly standardized interface used for a long time, there are still many peripheral ICs in the market compatible with the ISA interface. Therefore, the problem of interface conversion will occur. The peripheral ICs using the ISA interface will no longer be used in newly designed mother boards and chipsets using the LPC interface, so interface incompatibility will occur.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide an LPC/ISA bridge for bridging an LPC interface to an ISA interface and its bridging method, which can transform related information needed between the LPC interface and the ISA interface, integrate devices (such as expansion slots and peripheral chips) using different interfaces in the same computer system, and solve problems as to the interface incompatibility.
To realize the above and other objects, the present invention provides an LPC/ISA bridge installed on an expansion card, for bridging an LPC interface to an ISA interface. The LPC/ISA bridge is active in response to a duty cycle indicative signal (LFRAME#) of the LPC interface and sequentially interprets related command, address and data information from command/address/data lines (LAD[
3
:
0
]) of the LPC interface, so as to produce the address, data and control signals of the ISA interface. Thereby, the control/address/data information can be converted into various formats between the LPC interface and the ISA interface, achieving the object of the present invention.
The LPC/ISA bridge includes a counter-based state machine and a decoder. The counter-based state machine receives a duty cycle indicative signal (LFRAME#) of the LPC interface. When a duty cycle is activated by the duty cycle indicative signal, the counter-based state machine counts in response to a clock signal and serially outputs several state signals. The counter-based state machine stops counting and outputting after a certain number of cycles inherently depending of decoding of cycle type. The decoder receives the state signals of the counter-based state machine, command/address/data lines (LAD[
3
:
0
]) of the LPC interface and other signal lines. In response to the state signals, the decoder can abstract command, address and data information from the command/address/data lines of the LPC interface and transform them into address, data and control signals of the ISA interface. Thereby, information abstracted from the command/address/data lines of the LPC interface can be transformed into related signals of the ISA interface, achieving the object of the present invention.
Further, in the bridging method of the present invention, after the counter-based state machine produces a series of state signals, the decoder can latch the address information from the command/address/data lines in response to a first set of the state signals which are corresponding to an address field of the command/address/data lines, then output the obtained address information in parallel to produce the address signal of the ISA interface. The decoder can also latch the data information from the command/address/data lines in response to a second set of the state signals, then output the obtained data information in parallel to produce the data signal of the ISA interface. Thereby, signals used in different interfaces can be converted to solve the interface incompatibility.
REFERENCES:
patent: 5991841 (1999-11-01), Gafken et al.
Lu Max
Wang Cheng-Chih
Ladas & Parry
Thai Xuan M.
Winbond Electronics Corp.
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