Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2006-02-24
2010-02-23
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S081000, C326S056000, C326S058000
Reexamination Certificate
active
07667491
ABSTRACT:
Method and apparatus are provided for buffering a data signal to a low voltage logic device. A circuit for buffering the data signal to the low voltage logic device includes an output buffer (12) having first and second inputs and an output and at least one N-type isolation transistor (13, 19) having a source coupled to one or both of the second input and the output. The first input receives the data signal, the second input receives a supply potential, and the output couples to the low voltage logic device. The isolation transistor has a drain for receiving a first potential and is configured to supply a second potential to the output buffer when the gate receives a bias potential. The second potential based on the first potential. The bias potential is greater than the supply potential.
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International Search Report and Written Opinion related to PCT/US07/61844.
Bennett Paul T.
Pigott John M.
Freescale Semiconductor Inc.
Hammond Crystal L
Ingrassia Fisher & Lorenz P.C.
Tan Vibol
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