Low voltage differential swing interconnect buffer circuit

Electronic digital logic circuitry – Interface – Current driving

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326 34, 326 30, 326119, H03K 19094, H03K 190185

Patent

active

059777966

ABSTRACT:
A low voltage differential swing interconnect I/O buffer within an output buffer part comprising a voltage controlled current source, voltage controlled current sink, and a current switch and an input buffer part comprising a voltage controlled resistance. The output current and input resistance of the I/O buffer is determined by biasing voltages which are generated by on-chip reference circuits and applied to the voltage controlled components of the I/O buffer. Using two input reference voltages and a single reference resistor, the reference circuits dynamically adjust the biasing voltages so that the I/O buffer maintains the required output current and input resistance for all manufacturing process, supply voltage, and chip temperature variations.

REFERENCES:
patent: 5216297 (1993-06-01), Proebsting
patent: 5408497 (1995-04-01), Baumann et al.
patent: 5519728 (1996-05-01), Kuo
patent: 5541532 (1996-07-01), McCall
patent: 5635859 (1997-06-01), Yokota et al.
patent: 5798658 (1998-08-01), Werking
patent: 5818261 (1998-10-01), Perner
"Draft Standard For Low-Voltage Differential Signal (LVDS) For Scalable Coherent Interface (SCI)", Draft 1.3, Nov. 27, 1995 [Draft 1.3 IEEE P1596.3-1995].

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