Low voltage differential signal receiver

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C326S086000, C326S087000, C330S253000

Reexamination Certificate

active

11372811

ABSTRACT:
An LVDS receiver of the present invention rapidly restores an LVDS inputted at a high speed into a full swing signal of CMOS or TTL level.A common mode shifter amplifies an LVDS contained in a common mode signal and then shifts a level of the common mode signal. Further, an intermediate amplifying unit amplifies a signal outputted from the common mode shifter to have a margin above and below a threshold voltage in a predetermined logic lever. In addition, an output buffer unit amplifies a signal outputted from the intermediate amplifying unit to produce a full swing signal.

REFERENCES:
patent: 6052025 (2000-04-01), Chang et al.
patent: 6781460 (2004-08-01), Crain et al.
patent: 6870424 (2005-03-01), Pradhan et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Low voltage differential signal receiver does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Low voltage differential signal receiver, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low voltage differential signal receiver will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3911627

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.