Low voltage differential signal receiver

Details Low voltage differential signal receiver Low voltage differential signal receiver

2008-03-11

2008-03-11

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S086000, C326S087000, C330S253000

Reexamination Certificate

active

07342418

ABSTRACT:
An LVDS receiver of the present invention rapidly restores an LVDS inputted at a high speed into a full swing signal of CMOS or TTL level.A common mode shifter amplifies an LVDS contained in a common mode signal and then shifts a level of the common mode signal. Further, an intermediate amplifying unit amplifies a signal outputted from the common mode shifter to have a margin above and below a threshold voltage in a predetermined logic lever. In addition, an output buffer unit amplifies a signal outputted from the intermediate amplifying unit to produce a full swing signal.

REFERENCES:
patent: 6052025 (2000-04-01), Chang et al.
patent: 6781460 (2004-08-01), Crain et al.
patent: 6870424 (2005-03-01), Pradhan et al.

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