Low voltage CMOS to low voltage PECL converter

Details Low voltage CMOS to low voltage PECL converter Low voltage CMOS to low voltage PECL converter

1995-09-14

1997-05-27

Westin, Edward P.

Electronic digital logic circuitry

Interface

Logic level shifting

326 71, H03K 190185

Patent

active

056336020

ABSTRACT:
A means of converting low voltage CMOS logic levels operating with a 3.3 volts logic level to low voltage PECL logic levels operating with a 3.3 volts supply voltage and a 0.8 volts logic level. The circuit design is process insensitive, and the characteristics of the converter emulate the emitter follower outputs of ECL devices. The converter solves the signal ringing problems caused by open output conditions, and is less susceptible to electromagnetic interference.

REFERENCES:
patent: 4704549 (1987-11-01), Sanwo
patent: 4890019 (1989-12-01), Hoyte
patent: 5047671 (1991-09-01), Suthar
patent: 5365127 (1994-11-01), Manley

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