Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Patent
1996-06-07
1999-12-07
Le, Vu A.
Static information storage and retrieval
Read/write circuit
Including level shift or pull-up circuit
36518909, 36523006, G11C 700
Patent
active
059994614
ABSTRACT:
A bootstrap circuit suitable for use in driving the word line of a FRAM.RTM. memory circuit is energized by a VDD power supply voltage. The bootstrap circuit includes a first N-channel MOS transistor wherein the source/drain forms the input of the circuit. A second N-channel MOS transistor is included wherein one of the source/drains receives a clock signal, and the other source/drain forms the output, which drives the word line. The gate of the second transistor is coupled to the other source/drain of the first transistor. The bootstrap circuit includes further circuitry for generating a voltage greater tan the VDD power supply voltage that is coupled to the gate of the first transistor. A capacitor or capacitor-connected transistor is coupled between the input and the gate of the first transistor, and a third transistor has one source/drain coupled to the gate of the first transistor, and the other source/drain receives a control signal, and the gate is coupled to the VDD power supply. The bootstrap circuit is operational even for VDD power supply voltages less than or equal to 3.3 volts.
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Verhaeghe Donald J.
Wilson Dennis R.
Le Vu A.
Meza Peter J.
Ramtron International Corporation
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