Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-05-03
2003-09-30
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S683000
Reexamination Certificate
active
06627543
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method of manufacturing semiconductor devices and, more particularly, to a self-aligned silicide (“salicide”) process.
2. Description of the Related Art
As semiconductor devices become highly integrated with smaller line widths and geometries, various problems such as increased contact resistance, leakage currents, and junction punchthrough occur, causing a degradation in the device performance and reliability of the semiconductor manufacturing processes. For example, the polysilicon electrodes that form the gates of MOS devices and shallow diffusions become undesirably resistive, limiting the speed of circuits. A variety of device technologies have been investigated in an effort to alleviate these problems.
One such technology is a so-called salicide process using self-aligned silicides, i.e., low-resistivity compounds formed by the reaction of noble or refractory metals with the underlying silicon, in the formation of contacts. By forming such low resistivity silicides on their surfaces, the sheet resistance of polysilicon gate and diffusion can be reduced.
According to conventional salicide processes, a layer of a refractory metal is blanket deposited by sputtering over the integrated circuit structure. Following the blanket deposit, the resulting structure is annealed so that the metal will react with the underlying silicon to form a self-aligned silicide.
Titanium (Ti) salicide, formed by the reaction of deposited titanium and the underlying silicon, has been widely used for the salicide process because it has many excellent properties such as low junction leakage, low sheet resistance, and low contact resistance. However, Ti salicide also has problems such as a linewidth-dependent increase in sheet resistance and a decrease of thermal process window for forming Ti salicide. These problems have become more severe as device features shrink below 0.20 &mgr;m. As a result, Ti salicide has become a more and more unsuitable material in the modern semiconductor manufacturing process.
Recently, cobalt (Co) salicide has become an important alternative over Ti salicide because they remain independent of line widths. However, Co salicide has its own problems. Conventionally, Co sputter deposition is performed at room temperature or higher. For example, U.S. Pat. Nos. 5,728,625 and 5,780,361 disclose Co sputter deposition performed above room temperature. Unfortunately, semiconductor devices with Co salicide, formed using the conventional sputtering process, have shown unsatisfactory device characteristics such as low charge-breakdown (Qbd).
Accordingly, there is still a need for improvement in the salicide process to improve device characteristics such as Qbd.
SUMMARY OF THE INVENTION
It is, therefore, an object of the invention to improve the device characteristics and reliability of a semiconductor device formed using a salicide process.
The present invention provides a method for forming a salicide layer on a selected portion of a semiconductor substrate. The method of the present invention comprises providing a semiconductor substrate with at least one exposed silicon surface. The semiconductor substrate is placed into a sputtering chamber. A silicide-forming metal layer is sputter deposited over the exposed silicon surface. A process temperature is controlled below room temperature during the sputter deposition. The silicide-forming metal layer formed on the exposed silicon surface is first annealed to convert the silicide-forming metal layer into a salicide layer.
In addition, a novel sputter deposition system is provided for depositing a silicide-forming metal layer on a semiconductor substrate in accordance with the present invention. The system of the present invention is comprised of a sputter chamber including a mount for mounting a semiconductor substrate; a cooling mechanism coupled with the mount for cooling the semiconductor substrate. The cooling mechanism includes a controller to maintain a process temperature below room temperature.
In the devices formed accordance with the present invention, increased charge-to-breakdown is achieved compared to the devices with a conventionally processed salicide structure, thereby improving the characteristics of the devices.
REFERENCES:
patent: 5728625 (1998-03-01), Tung
patent: 5780361 (1998-07-01), Inoue
patent: 5902129 (1999-05-01), Yoshikawa et al.
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patent: 6458703 (2002-10-01), Endo et al.
patent: 05186868 (1993-07-01), None
Inoue et al., “A new Cobalt Salicide Technology for 0.5&mgr;m CMOS Devices”, IEEE Transactions on Electron Devices, vol. 45, No. 11, Nov. 1998, p. 2312-2318.
Cao Wanqing
Hixson Robert B.
Lee Eric S.
Lee Shih-Ked
Lo Guo-Qiang (Patrick)
Foong Suk-San
Fourson George
Integrated Device Technology Inc.
Marger Johnson & McCollom PC
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