Metal fusion bonding – Process – Plural joints
Reexamination Certificate
2006-02-07
2006-02-07
Stoner, Kiley S. (Department: 1725)
Metal fusion bonding
Process
Plural joints
C228S215000, C228S246000, C228S254000
Reexamination Certificate
active
06994243
ABSTRACT:
A solder interconnection uses preferably lead-rich solder balls for making a low temperature chip attachment directly to any of the higher levels of packaging substrate. After a solder ball has been formed using standard processes, a thin cap layer of preferably pure tin is deposited on a surface of the solder balls. An interconnecting eutectic alloy is formed upon reflow. Subsequent annealing causes tin to diffuse into the lead, or vice versa, and intermix, thereby raising the melting point temperature of the cap layer of the resulting assembly. This structure and process avoids secondary reflow problems during subsequent processing.
REFERENCES:
patent: 4545610 (1985-10-01), Lakritz et al.
patent: 5027188 (1991-06-01), Owada et al.
patent: 5060844 (1991-10-01), Behun et al.
patent: 5075965 (1991-12-01), Carey et al.
patent: 5161729 (1992-11-01), Dunaway et al.
patent: 5221038 (1993-06-01), Melton et al.
patent: 5234152 (1993-08-01), Glaeser
patent: 5372298 (1994-12-01), Glaeser
patent: 5376584 (1994-12-01), Agarwala
patent: 5429292 (1995-07-01), Melton et al.
patent: 5470787 (1995-11-01), Greer
patent: 5473814 (1995-12-01), White
patent: 5553769 (1996-09-01), Ellerson et al.
patent: 5580668 (1996-12-01), Kellam
patent: 5591941 (1997-01-01), Acocella et al.
patent: 5634268 (1997-06-01), Dalal et al.
patent: 5639696 (1997-06-01), Liang et al.
patent: 5675889 (1997-10-01), Acocella et al.
patent: 5729896 (1998-03-01), Dalal et al.
patent: 5796591 (1998-08-01), Dalal et al.
patent: 5808853 (1998-09-01), Dalal et al.
patent: 5825629 (1998-10-01), Hoebener et al.
patent: 5859470 (1999-01-01), Ellerson et al.
patent: 5912505 (1999-06-01), Itoh et al.
patent: 5920125 (1999-07-01), Ellerson et al.
patent: 5953623 (1999-09-01), Boyko et al.
patent: 5965945 (1999-10-01), Miller et al.
patent: 6033929 (2000-03-01), Murakami et al.
patent: 6121069 (2000-09-01), Boyko et al.
patent: 6130476 (2000-10-01), LaFontaine, Jr. et al.
patent: 6162660 (2000-12-01), LaFontaine, Jr. et al.
patent: 6313533 (2001-11-01), Funaya et al.
patent: 6330967 (2001-12-01), Milewski et al.
patent: 6847118 (2005-01-01), Milewski et al.
patent: 2002/0036227 (2002-03-01), Milewski et al.
patent: 407176567 (1995-07-01), None
Milewski Joseph M.
Woychik Charles G.
RatnerPrestia
Samodovitz Arthur J.
Stoner Kiley S.
LandOfFree
Low temperature solder chip attach structure and process to... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Low temperature solder chip attach structure and process to..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low temperature solder chip attach structure and process to... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3644375