Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2003-08-22
2004-12-28
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S198000, C438S377000
Reexamination Certificate
active
06835606
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims the priority benefit of Taiwan application serial no. 92107490, filed Apr. 2, 2003.
BACKGROUND OF INVENTION
1. Field of Invention
The present invention relates to a method of forming a low temperature polysilicon (LTPS) thin film transistor (TFT). More particularly, the present invention relates to a method of forming the polysilicon layer inside a low temperature polysilicon thin film transistor.
2. Description of Related Art
An outcome of the rapid progress in high-tech products is the popularity of video products such as digital video or imaging devices in our daily life. To be useful, these digital video and imaging devices must provide a high-quality display so that a user can operate a controlling device after reading some important information disseminated from the display.
At present, liquid crystal displays (LCD) are the most common type of displays in the market with applications in desktop computers, personal computers, game centers and monitors. The principal driving devices for a liquid crystal display (LCD) are thin film transistors (TFT). Because the amorphous silicon layer inside the amorphous silicon thin film transistors can be grown at a relatively low temperature of between 200° C. to 300° C., the amorphous silicon thin film transistors are frequently used in liquid crystal displays. However, the electron mobility of amorphous silicon is lower than 1 cm
2
/V.s. Hence, amorphous silicon thin film transistor can hardly match the speed desired from a high-speed device. On the other hand, the polycrystalline silicon (or polysilicon) thin film transistor has electron mobility and low temperature sensitivity higher than the amorphous silicon thin film transistor. In other words, the polysilicon thin film transistors are better attuned to high-speed operations. Yet, the process of transforming amorphous silicon into polysilicon layer often requires an annealing temperature in excess of 600° C. Therefore, expensive quartz substrate instead of glass substrate must be used. Moreover, it is difficult to fabricate a quartz substrate with a moderately large size. Hence, the size of a liquid crystal display deploying polysilicon thin film transistors is often limited to between 2 to 3 inches on each side.
To reduce production cost, glass substrates are commonly used for producing liquid crystal displays so that the temperature for fabricating the polysilicon layer must be reduced to below 500° C. Because of this, a number of methods for fabricating a polysilicon layer at a reduced temperature are developed, among which, the excimer laser annealing (ELA) and the metal induced crystallization (MIC) are the most prominent. Since these two methods are capable of producing high-quality, contaminant-free and low-defect-density polysilicon layer, the polysilicon thin film transistors fabricated using such low temperature process are often called ‘the low temperature polysilicon thin film transistors’ or ‘LTPS-TFT’. In addition, due to the high electron mobility of the polysilicon, the peripheral circuit region lying outside the display region are formed together with the thin film transistor array in the same process.
The metal induced crystallization (MIC) process relies on the lateral growth of crystals. First, a metallic layer for catalyzing the crystallization of an amorphous silicon layer is formed before or after the process of depositing amorphous silicon. Thereafter, a low temperature annealing process is performed to produce a polysilicon layer. Aside from speeding up the transformation of amorphous silicon into polysilicon in the MIC process, the metallic layer also results in the formation of a metal silicide layer after the annealing operation. The metal silicon layer is properly set by controlling the relationship between the direction of lateral growth and the direction of extension of the source-channel-drain chain. In general, a perpendicular relation between the aforementioned directions is useful for processing a pixel region while a parallel relation between the aforementioned directions is useful for processing a peripheral circuit region. Nevertheless, one major drawback of the MIC method is the production of too many defects so that a subsequent high-temperature annealing operation such as a rapid thermal process or an excimer laser annealing is often required. Consequently, most polysilicon thin film transistors are fabricated using the laser excimer annealing method.
However, in a conventional active matrix liquid crystal display, the low temperature polysilicon thin film transistors of the peripheral circuit region must have high electron mobility and on-state current. On the other hand, the low temperature polysilicon thin film transistors of the pixel region must have a low leakage current. The laser excimer annealing process can produce polysilicon layer that satisfy the demand in the pixel region or the peripheral circuit region only but not both.
SUMMARY OF INVENTION
Accordingly, one object of the present invention is to provide a low temperature polysilicon thin film transistor and a method of forming the polysilicon layer so that polysilicon layers with larger grain size are formed inside a peripheral circuit region and polysilicon layers with smaller grain size are formed inside a display region.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method of forming a polysilicon layer. First, an amorphous silicon layer is formed over a panel. The panel has a display region and a peripheral circuit region. Thereafter, a metallic layer is formed over a portion of the amorphous silicon layer in the peripheral circuit region. A crystallization process is carried out to transform the amorphous silicon layer in the peripheral circuit region into a polysilicon layer. An excimer laser annealing process is performed to increase the size of crystals within the polysilicon layer in the peripheral circuit region and, at the same time, transform the amorphous silicon layer in the display region into a polysilicon layer. The crystals within the polysilicon layer in the peripheral circuit region have an average size greater than the crystals within the polysilicon layer in the display region.
This invention also provides a method of fabricating a low temperature thin film transistor on a panel. The panel has a display region and a peripheral circuit region. First, an amorphous silicon layer is formed over the panel. Thereafter, using a mask, a metal induced crystallization process is performed to transform the amorphous layer in the peripheral circuit region into a polysilicon layer. After removing the mask, an excimer laser annealing operation is carried out to increase the size of crystals within the polysilicon layer in the peripheral circuit region and, at the same time, transform the amorphous silicon layer in the display region into a polysilicon layer. The polysilicon layer with large crystals is patterned to form a plurality of island polysilicon layers. A channel region is formed in each island polysilicon layer and a doped source/drain region is formed on each side of the channel region. Finally, a gate is formed over each channel region.
In this invention, a metal induced crystallization followed by a post excimer laser annealing is used to fabricate the polysilicon layer in the peripheral circuit region. The post excimer laser annealing operation is also used to form the polysilicon layer in the display region. With this processing sequence, polysilicon layers with a larger gain size is produced in the peripheral circuit region while polysilicon layers with a smaller grain size is produced in the display region. Hence, the properties of the polysilicon thin film transistors in the peripheral circuit region and the display region are optimized.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended t
Peng Chia-Tien
Wu Huan-Chao
Au Optronics Corporation
Dang Phuc T.
Jianq Chyun IP Office
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