Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2000-05-15
2004-08-17
Booth, Richard A. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S770000
Reexamination Certificate
active
06777274
ABSTRACT:
This application relies for priority upon Korean Patent Application No. 2000-03467, filed on Jan. 25, 2000 and No. 2000-23111, filed on Apr. 29, 2000, the contents of which are herein incorporated by reference in their entirety.
FIELD OF THE INVENTION
The present invention relates generally to a low temperature polycrystalline silicon type thin film transistor and a method of fabricating the thin film transistor, and is directed more particularly to the thin film transistor which can increase the mobility of charge carrier and the method of fabricating the thin film transistor.
BACKGROUND OF THE INVENTION
Thin film transistor used in LCD(Liquid Crystal Display) can be divided into two types, amorphous silicon type and polycrystalline silicon type, by material structure of silicon thin film.
In considering that the glass substrate used in LCD panel cannot sustain the flat state in high temperature process, the amorphous silicon type thin film transistor is more favorable for LCD fabrication because the amorphous silicon thin film can be formed by a low temperature process, like a CVD(Chemical Vapour Deposition) process under the temperature of 400° C.
But, in amorphous silicon, the mobility of charge carrier is lower than that in polycrystalline silicon. And the rapid operation of transistor is needed for integrated circuits used in driving LCD. Thus, the integrated circuits cannot be formed on the amorphous silicon thin film of which the active region of pixel transistor of LCD is made. And thus, the integrated circuits should be prepared independently and attached to the peripheral part of LCD panel to drive the pixel transistors of LCD.
On the other hand, in the polycrystalline silicon type thin film transistor, the mobility of charge carrier is far higher than the mobility of charge carrier in an amorphous silicon type thin film transistor. Thus, the transistor formed on the polycrystalline silicon thin film can be adapted in an integrated circuit for driving LCD. And that means the integrated circuit for driving LCD can be formed on the polycrystalline silicon thin film formed on a substrate of LCD panel. Resultantly, in the LCD of polycrystalline silicon type thin film transistor, power consumption of LCD and expense of fabricating LCD can be lowered.
But, in case of adapting polycrystalline silicon type thin film transistor, the additional process of laser beam scanning to crystallize the primal amorphous silicon film formed by low temperature CVD is needed. And, the fact that driving integrated circuit generally has both p type channel transistor and n type channel transistor makes the process of forming transistors of driving integrated circuit and the process of forming LCD more complicated.
Polycrystalline silicon type thin film transistor can also be compared with mono crystalline silicon type transistor which is formed on mono crystal silicon wafer. In comparison with mono crystalline silicon, the polycrystalline silicon has much more grain surface and thus has much more defects like dangling bonds. Accordingly, in a polycrystalline silicon type thin film transistor, the interface between polycrystalline silicon and gate oxide has much more crystal defects. These defects decrease the average mobility of charge carrier in the channel of polycrystalline silicon type thin film transistor by capturing the charge carrier when the source/drain current flows. Thus, the defects lower the speed of operation in the transistor. To improve the speed of operation of polycrystalline silicon type thin film transistor and to improve the quality of LCD, the decrease of the mobility of charge carrier in polycrystalline silicon should be avoided.
The crystal defect occurs at the point of destroyed crystal bond. In the region of crystal defect, the regularity of crystal is destroyed and some electrons of the atoms of defected area are released from the covalent bond of crystal and remain alone. Therefore, on the surface of crystal grain and in the interface between the crystal and other materials, there are a lot of single electrons having a strong tendency of making bond with electrons of other atoms or free electrons as charge carriers to be pair. Thus, in the channel region of polycrystalline silicon type thin film transistor, a considerable amount of charge carrier electrons is to be captured during the operation of the transistor and that lowers the conductivity of channel and the speed of operation of the transistor.
To get rid of the charge carrier trap, the crystal defect, of polycrystalline silicon type thin film transistor, the method of containing hydrogen in the polycrystalline silicon is used. The method of containing hydrogen in amorphous silicon and crystallizing amorphous silicon is also used. By these method, the hydrogen atom donate the electron it possesses and makes covalent bond with single state electron of silicon atom in the defect point and the defect point can be cured. And the field effective mobility can be recovered.
But, the silicon-hydrogen bond made in these method of containing hydrogen in the polycrystalline or amorphous silicon has low bond energy. So, the bond can be easily dissolved and the hydrogen is volatilized in a process of high temperature like laser scanning which is for amorphous silicon crystallization and is done at the temperature about 300° C. Furthermore, as the time pass, the number of silicon-hydrogen bond decrease and the occurrence of charge carrier electron capturing increase in the transistor. This is caused by the fact that the heat generated during the operation of polycrystalline silicon type thin film transistor stimulate the hydrogen atoms to have the tendency of being volatilized. And this naturally lowers the reliability of integrated circuit device having the polycrystalline silicon thin film transistor. Above-mentioned weakness of polycrystalline silicon type thin film transistor is well described in the following thesis.
(I. W. Wu, W. B. Jackoson, T. Y. Huang, A. G. Lewis and A. Ciang, “Mechanism of device degradation in n- and p-channel TFTs by electrical stressing”, IEEE Electron Device Lett, vol.12, p.181, April 1991: I. W. Wu, W. B. Jackoson, T. Y. Huang, A. G. Lewis and A. Ciang, “Passivation kinetics of two types of defects in polysilicon TFT by plasma hydrogenation”, IEEE Electron Device Lett, vol.11, p.167, April 1990)
OBJECTS AND SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a polycrystalline silicon type thin film transistor and a method of fabricating the thin film transistor to diminish the problems generated from the dangling bond in the channel region of thin film transistor.
It is other object of the present invention to provide a polycrystalline silicon type thin film transistor improved in the carrier mobility in the channel region of thin film transistor and thus improved in the speed of operation of thin film transistor.
It is another object of the present invention to provide a polycrystalline silicon type thin film transistor improved in the value of threshold swing in a thin film transistor.
According to the present invention there is provided with a top gate type polycrystalline silicon thin film transistor in which the thickness of the oxidized amorphous layer where the concentration of oxygen atom equal to or exceed 10
20
atoms/cm
3
under CVD gate oxide layer is in the range of 10 Å~100 Å. And in the other level of oxygen concentration, the top gate type polycrystalline silicon thin film transistor of the present invention can be characterized in that the oxygen atom concentration at the spot of 20 Å below the CVD gate oxide of the channel region is more than 3*10
20
atoms/cm
3
or in that the oxygen atom concentration at the spot of 40 Å below the CVD gate oxide of the channel region is more than 10
20
atoms/cm
3
by ultra low energy SIMS(Second Ion Mass Spectroscopy).
According to the present invention there is also provided with a method of fabricating a thin film transistor characterized by the step of oxidizing the surfa
Kim Hyun-Dae
Min Hoon-Kee
Moon Kook-Chul
Booth Richard A.
McGuireWoods LLP
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