Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-10-17
2004-06-29
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S654000, C438S688000
Reexamination Certificate
active
06756302
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to metallization processes for use in making devices such as semiconductor devices, and to devices formed using those metallization processes.
2. Background of the Invention
Formation of metallization layers is a fundamental process in the formation of semiconductor devices. In particular, a metal layer can be formed so as to fill openings in a to dielectric layer, forming interconnects or vias or cover steps formed during fabrication of a semiconductor device. The formation of a metal layer over vias having a high aspect ratio (i.e., ratio of the depth of the via to the width or diameter of the via) or steps having a relatively large height can be difficult, exhibiting problems such as cusping and voiding, especially as device dimensions are reduced.
In one method of forming a metal layer on a semiconductor wafer, the metal layer is formed using a two step process. In a first step, a relatively thick portion of the metal layer is deposited while the semiconductor wafer is held at a relatively cold temperature (i.e., preferably less than or equal to 200° C. when the metal is Al). The thickness of this portion must be adequate, in view of relevant process parameters (e.g., the geometry being metallized and the metal being used), to ensure that adequate metal is present to avoid the formation of voids during a metal reflow that occurs during the second step. For example, when the metal is an aluminum alloy, this thick portion preferably has a thickness equal to about 50% to 75% of the total thickness of the metal layer to be formed. Further, this portion is preferably deposited at a rate greater than about 150 Å/sec. In the second step, the remainder of the metal is deposited while the semiconductor wafer is held at a relatively high temperature (e.g., when the metal is an aluminum alloy, about 400° C. to about 500° C.) which allows the deposited metal to reflow through grain growth, recrystallization and bulk diffusion. The rate of deposition of the aluminum in the second step is preferably slower than that of the first step, but is preferably greater than about 50 Å/sec., and more preferably between about 100 Å/sec. and about 200 Å/sec. The deposition rate can be increased during the second step to increase the process throughput. However, this method does not effectively minimize the number of defects formed in the metal layer (such as result from cusping and/or voiding).
In another method of forming a metal layer on a semiconductor wafer, the metal layer is formed using a two step process including a first, cold deposition step of a seed layer followed by a second, hot deposition step. However, in this method, a relatively thin portion of the metal layer (e.g., 25% of the overall thickness) is deposited as a seed layer while the semiconductor wafer is held at the cold temperature, while a relatively large portion of the metal layer (e.g., 75% of the overall thickness) is deposited while the semiconductor wafer is held at the hot temperature. When the metal is an aluminum alloy, the wafer can be held at a temperature of about 200° C. for a period of about 10 seconds during the cold deposition step. During the hot deposition step, a heated gas (typically argon) is flowed against the backside of the wafer to heat the wafer and the deposited metal. The wafer can be heated to a temperature of about 375° C. to about 500° C. The wafer is typically held at that temperature for about 3-5 minutes. However, the heated gas flow is kept relatively low (e.g., less than about 15 sccm and typically in the range between about 10 sccm and about 15 sccm) so that the pressure within the process chamber can be kept low (e.g., less than about 2 mtorr). Since the heated gas flow is kept relatively low, the wafer is not heated as fast as is desirable to minimize the number of defects formed (e.g., by cusping and/or voiding) in the metal layer. Efforts to increase the temperature of the heated gas have caused the steady state temperature of the wafer during the hot deposition step to increase, thus increasing the likelihood of damaging the wafer (in particular, existing metallization). Application of heated gas at multiple locations has caused the distribution of defects to be more evenly spread throughout the metal layer, however, it does not adequately reduce the overall number of defects.
Xu et al. report in SPIE, vol. 2335, pp.70-79 processes for filling contacts, via's and trenches with a PVD or CVD barrier metal file and a PVD Al—Cu plug which is applicable for contacts or via's having sizes down to 0.25 &mgr;m and aspect ratios up to 5.
Xu et al. in Thin Solid Films 253 (1994) 367, 337 reports Al planarization processes by high temperature flow as well as a two step cold-hot sputtering, in which 0.25 &mgr;m contacts of a depth of 1.2 &mgr;m were filled.
Accordingly, there remains a need for a process of forming a metallization layer, which reliably forms a layer of good conductivity, is capable of filling high aspect ratio vias of small dimensions (e.g. ≦0.40 &mgr;m and especially ≦0.25 &mgr;m) and can be processed with a high throughput.
SUMMARY OF THE INVENTION
According to one embodiment of the present invention is a method of reliably forming a metallization layer having good conductivity.
According to another embodiment of the present invention is a method of forming a metallization layer having good conductivity by three steps comprising:
i) depositing a seed layer of metal on a first substrate surface, the seed layer being sufficient to cover the substrate surface;
ii) depositing a second amount of metal on said seed layer at a substrate temperature and power providing a metal diffusion rate and a first metal deposition rate sufficient to inhibit void formation in a contact via having an aspect ratio of at least 1.0; and
iii) depositing a third amount of metal on said second amount of metal.
The invention enables a layer of metal to be formed on a substrate with few or no voids formed in the layer. According to the invention, a layer of metal can be formed on a substrate using 1) a cold deposition step to form a seed layer; 2) a slow hot deposition step sufficient to fill an opening; and 3) a rapid hot deposition step to obtain a desired thickness. The cold deposition step need only be performed for a time sufficient to deposit metal over the entire surface on which the metal layer is to be formed. In the slow hot deposition step, further metal may be deposited in the opening while the deposited metal undergoes surface diffusion. Under conditions of a high surface diffusion rate relative to the deposition rate, good filling of openings is obtained. Further, when deposition onto a liner/wetting layer of a second metal (e.g. Ti), under appropriate power and temperature conditions, formation of high resistance metal phases (relative to the metal being deposited. e.g. TiAl
3
) can be inhibited, thus improving (i.e. lowering) contact resistance of the deposited metal in the filled opening. After surface diffusion has been completed, the metal is deposited while undergoing bulk diffusion. After the opening is filed, the metal may be deposited at a rapid rate to meet thickness requirements.
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Geha Sam
Lau Gorley
Shan Ende
Cypress Semiconductor Corporation
Toledo Fernando
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