Low temperature/low dopant oxide glass film

Details Low temperature/low dopant oxide glass film Low temperature/low dopant oxide glass film

1996-12-12

2002-12-03

Chaudhuri, Olik (Department: 2813)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

C438S632000, C438S787000, C438S790000

Reexamination Certificate

active

06489255

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method of manufacturing a semiconductor device and, in particular, to a method of forming a low temperature, low dopant oxide glass layer on the device.
2. Description of Related Art
As a result of the development of sub-half micron size gate conductors on complimentary metal oxides semiconductors (CMOS), it has become necessary to develop better layers over the semiconductors to provide electrical insulation. Oxide glass layers, particularly silicate glasses doped with boron and/or phosphorus, have been typically employed because the low melting temperatures have permitted the layers to be reheated to soften the glass and cause it to reflow to create a planar surface on the semiconductor device. It has been recognized that it is important to formulate and process these oxide glass films so that they have the ability to fill small gaps on the surface of the semiconductor device without retaining voids or bubbles within the oxide glass layer.
One recent oxide glass layer system is described in Maeda et al. U.S. Pat. No. 5,286,681 which discloses chemical vapor deposition (CVD) of a boron phosphorous silicate glass by reacting in the gaseous phase tetraethylorthosilicate (TEOS) and ozone (O
3
), trimethylphosphate (TMP) and trimethylborate (TMB) in carrier gas. No concentrations of the ozone-, boron- or phosphate-containing gases are given, although the final boron phosphates silicate glass (BPSG) film is disclosed as having a boron concentration of 4 mole percent and a phosphorous concentration of 4 mole percent in a film layer thickness of 8000 angstroms. In U.S. Pat. No. 5,231,058, Maeda et al. describe a process for forming a CVD film utilizing a polysiloxane compound having at least 2 silicone-oxygen bonds with ozone which utilizes ozone concentrations of about 0.6 to 4 mole percent and trimethylphosphate and triethylborate in undisclosed concentrations.
Lee et al. U.S. Pat. Nos. 5,166,101 5,314,845 and 5,354,387 disclose CVD deposition of oxide glass layers using gaseous sources of phosphorus and boron dopants with ozone and tetraethylorthosilicate as a source of silicon. These patents disclose a two step process in which the second step forms a cap over the initially deposited layer of silicon oxide glass to prevent moisture absorption. This process requires high temperature annealing at about 850° C. to achieve void free fill on the semiconductor device. Additionally, the ozone layers are at approximately 1 vol. percent concentration carrier gas (equivalent to about 1.5 weight percent). No specific concentrations for the gaseous boron and phosphate sources are disclosed. In addition to requiring a second capping step, a deficiency of this system is that the film can not be used in advanced CMOS devices having for example 0.25 micrometer width gate conductors where the high temperature reflow of 850° C. would cause damage to the semiconductor device. This process is also unsuitable in devices where subsequent etching will expose the porous films that will absorb water and cause significant device and reliability problems.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide an improved layer and method of applying a layer of silicon oxide glass.
It is another object of the present invention to provide a method for depositing an oxide glass layer which may be formed in a single step and does not require a capping layer.
It is yet another object of the present invention to provide a silicon oxide glass layer with enhanced gap fill capability, i.e., improved step coverage/reflow angle, and to reduce incorporation of moisture into the layer if the device is subsequently etched or exposed to water.
It is yet another object of the present invention to provide a process for deposition of a silicon oxide glass layer on semiconductor devices which utilizes lower annealing temperatures.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
SUMMARY OF THE INVENTION
The above and other objects, which will be apparent to those skilled in the art, are achieved in the present invention which provides a method of forming a chemical vapor deposited layer of doped oxide glass on a semiconductor device in a sub atmospheric or atmospheric chemical vapor deposition chamber comprising the steps of:
a) mixing and reacting gaseous sources of silicon, preferably tetraethylorthosilicate, ozone and at least one dopant selected from the group consisting of boron and phosphorus in a carrier gas over the semiconductor device, the ozone being present in a ratio of about 9-15 weight percent of the carrier gas and the dopant being present in an amount such that the deposited layer of oxide glass contains no greater than about 4 weight percent dopant concentration;
b) depositing a layer of doped oxide glass on the semiconductor device; and
c) annealing the layer of doped oxide glass on the semiconductor device at a temperature no greater than about 700° C.
Preferably, the dopant comprises boron and phosphorous present in an amount of from about 1-3 weight percent of the deposited film layer, and the method utilizes an annealing temperature of between about 450 and 650° C. The annealing step (c) may take place during the depositing step (b) or during a subsequent processing step. The doped layer may be used to form a final chemical vapor deposition layer on the semiconductor device. The invention is especially useful where the semiconductor device is a sub-half micron metal oxide semiconductor.


REFERENCES:
patent: 4845054 (1989-07-01), Mitchener
patent: 5094984 (1992-03-01), Liu et al.
patent: 5104482 (1992-04-01), Monkowski et al.
patent: 5139971 (1992-08-01), Giridhar et al.
patent: 5166101 (1992-11-01), Lee et al.
patent: 5180692 (1993-01-01), Ibuka et al.
patent: 5231058 (1993-07-01), Maeda et al.
patent: 5250468 (1993-10-01), Matsuura et al.
patent: 5286681 (1994-02-01), Maeda et al.
patent: 5314845 (1994-05-01), Lee et al.
patent: 5336640 (1994-08-01), Sato
patent: 5354387 (1994-10-01), Lee et al.
patent: 5405489 (1995-04-01), Kim et al.
patent: 5413967 (1995-05-01), Matsuda et al.
patent: 5462899 (1995-10-01), Ikeda
patent: 5484749 (1996-01-01), Maeda et al.
patent: 5525551 (1996-06-01), Ohta
patent: 5531183 (1996-07-01), Sivaramakrishnam
patent: 5576247 (1996-11-01), Yano et al.
patent: 5605867 (1997-02-01), Sato et al.
patent: 5705028 (1998-01-01), Matsumoto
Sato et al., “Very Low Temp. CVD of SiO2. . . ”, Abstract #9, pp. 31-33, Ma/1971.*
“Low Temperature Sub-Atmospheric CVD USG/PSG for Gap Filling and Planarization of Advanced Submicron Memory Devices”, Yieh et al., Abstract No. 148, pp. 248-249; 1992.
“Very Low Temperature CVD of SiO2Films Using Ozone and Organosilane”, Sato et al., Abstract No. 9, pp. 31-33; May 1971.
“Low Temperature Chemical Vapor Deposition of Dielectric Films Using Ozone and Organosilane”, Nishimoto et al., pp. 447-450; 1987.
“CVD TEOS/O3: Development History and Applications”, Maeda et al., pp. 83-88; Jun. 1993.
“TEOS and Ozone Atmospheric Pressure CVD of Borophosphosilicate Glass Films Using Triethylborate and Trimethylphosphate”, Fujino et al., J. Electrochem. Soc., vol. 140, No. 10, pp. 2922-2927; Oct. 1993.
“The National Technology Roadmap for Semiconductors”, Semiconductor Industry Association; 1994.
“TC2. Advanced Dielectrics and Planarization: Materials and Processes”, International Conference On Metallurgical Coatings and Thin Films, Nyugen et al.; Apr. 25, 1994.
“P5000 Dielectric CVD: ‘Kaizen’ Continuous Improvement”, Nguyen; 1994.

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