Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-12-05
2006-12-05
Vu, Hung (Department: 2811)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S592000, C438S630000, C438S647000
Reexamination Certificate
active
07144807
ABSTRACT:
Low resistivity, C54-phase TiSi2is formed in narrow lines on heavily doped polysilicon by depositing a bi-layer silicon film. A thin, undoped amorphous layer is deposited on top of a heavily doped layer. The thickness of the undoped amorphous Si is about 2.4 times the thickness of the subsequently deposited Ti film. Upon thermal annealing above 750° C., the undoped amorphous Si is consumed by the reaction of Ti+Si to form TiSi2, forming a low-resistivity, C54-phase TiSi2film on top of heavily doped polysilicon. The annealing temperature required to form C54 phase TiSi2is reduced by consuming undoped amorphous Si in the reaction of Ti and Si, as compared with heavily doped polysilicon. Narrow lines (<0.3 μm) of low-resistivity, C54-phase TiSi2films on heavily doped polysilicon are thus achieved.
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Herner Scott Brad
Vyvoda Michael A.
Brinks Hofer Gilson & Lione
SanDisk 3D LLC
Vu Hung
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