Low-profile shallow trench double polysilicon capacitor

Details Low-profile shallow trench double polysilicon capacitor Low-profile shallow trench double polysilicon capacitor

1997-11-10

1999-10-26

Chaudhuri, Olik

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257304, 257311, 438244, 438248, 438387, 438393, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

059733462

ABSTRACT:
A double layer planar polysilicon capacitor for use within integrated circuits and a method by which that planar polysilicon capacitor is formed. Formed within a semiconductor substrate is a deep trench which is filled with a dielectric material. Formed within the dielectric material within the deep trench is a shallow trench which has a first polysilicon capacitor plate formed therein. The upper surface of the first polysilicon capacitor plate is substantially planar with the semiconductor substrate. Formed upon the first polysilicon capacitor plate is a polysilicon capacitor dielectric layer. Formed upon the polysilicon capacitor dielectric layer is a second polysilicon capacitor plate.

REFERENCES:
patent: 5173437 (1992-12-01), Chi
patent: 5200353 (1993-04-01), Inuishi
patent: 5394000 (1995-02-01), Ellul et al.
patent: 5429981 (1995-07-01), Gardner et al.

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