Low profile semiconductor device having improved heat...

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – On insulating carrier other than a printed circuit board

Reexamination Certificate

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C257S687000

Reexamination Certificate

active

06847102

ABSTRACT:
A package substrate (12, 52) has a first surface, a second surface opposite a first surface, and a cavity (22, 70) formed in the first surface that extends into the package substrate. The cavity has a cavity wall substantially perpendicular to the first and second surfaces. An integrated circuit die (20, 60) is placed in the cavity, and a conductive material (24, 72) is placed in the cavity to thermally couple an outer wall of the integrated circuit to the cavity wall. The conductive material improves the heat dissipation path between the integrated circuit die and the package substrate. The cavity may extend through the package substrate to the second surface such that the second surface of the package substrate is substantially coplanar to a surface of the integrated circuit die. An encapsulation layer (28, 78) may be formed over the conductive material, integrated circuit die, and at least a portion of the first surface of the package substrate.

REFERENCES:
patent: 4633573 (1987-01-01), Scherer
patent: 5376588 (1994-12-01), Pendse
patent: 5436203 (1995-07-01), Lin
patent: 5541450 (1996-07-01), Jones et al.
patent: 5625222 (1997-04-01), Yoneda
patent: 5625227 (1997-04-01), Estes
patent: 5894108 (1999-04-01), Mostafazadeh
patent: 5923084 (1999-07-01), Inoue
patent: 6011315 (2000-01-01), Toyosawa et al.
patent: 20030042598 (2003-03-01), Crane et al.
patent: 20030218236 (2003-11-01), Wright et al.
patent: 1076361 (2001-02-01), None
patent: 2373924 (2002-10-01), None
International Search Report PCT/US03/27436.

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