Low power supply CMOS differential amplifier topology

Amplifiers – With semiconductor amplifying device – Including differential amplifier

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

330261, H03F 345

Patent

active

061408778

ABSTRACT:
A structure and method for improving differential amplifier operation is provided. High performance, wide bandwidth or very fast CMOS amplifiers are possible using the new circuit topology of the present invention. The differential amplifier of the present invention employs a novel common mode feedback circuit to back bias the body regions of the amplifying transistors in the differential amplifier. The novel configuration is achieved entirely using CMOS fabrication techniques and delivers high performance in both amplifier gain (G) and frequency response (fT) characteristics using a 1 micron (1.mu.) CMOS technology.

REFERENCES:
patent: 5384739 (1995-01-01), Keeth
patent: 5508604 (1996-04-01), Keeth
patent: 5699015 (1997-12-01), Dotson et al.
patent: 5835411 (1998-11-01), Briner
patent: 5838200 (1998-11-01), Opris
patent: 5841317 (1998-11-01), Ohmori et al.
patent: 5862077 (1999-01-01), Briner
patent: 5959492 (1999-09-01), Khoury et al.
patent: 6040720 (2000-03-01), Kosiec
patent: 6043689 (2000-03-01), Sheets, II et al.
patent: 6043718 (2000-03-01), Diniz et al.
Ferri, G., et al., "A Low-Voltage Fully Differential Constant-Gm Rail-to-Rail CMOS Operational Amplifier", Analog Integrated Circuits and Signal Processing, 16 (1), pp. 5-15, (1998).
Ferri, G., et al., "SP 24.1: A 1.3V Op/amp in Standard 0.7 micrometer CMOS with Constant g and Rail-to-Rail Input and Output Stages", IEEE International Solid-State Circuits Conference, pp. 382-383, (1996).
Griffith, R., et al., "SA 21.4: A 1V BiCMOS Rail-to-Rail Amplifier with n-Channel Depletion-Mode Input Stage", IEEE International Solid-State Circuits Conference, Digest of Technical Papers, First Edition, Volume 40, pp. 352-3, 484, 52, (1997).
Knee, D. L. et al., "General-Purpose 3V CMOS Operational Amplifier with a New Constant-Transconductance Input Stage", Hewlett-Packard Journal, pp. 114-120, ( Aug. 1997).
Kuge, S., et al., "SOI-DRAM Circuit Technologies for Low Power High Speed Multigiga Scale Memories", IEEE Journal of Solid-State Circuits, 31 (4), 586-591, (Apr. 1996).
Suma, K., et al., "An SOI-DRAM with Wide Operating Voltage Range by CMOS/SIMOX Technology", IEEE Journal of Solid-State Circuits, 29 (11), 1323-1329, (Nov. 1994).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Low power supply CMOS differential amplifier topology does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Low power supply CMOS differential amplifier topology, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low power supply CMOS differential amplifier topology will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2056650

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.