Low-power SRAM memory cell

Details Low-power SRAM memory cell Low-power SRAM memory cell

2004-09-23

2008-03-18

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S156000, C365S190000

Reexamination Certificate

active

07345909

ABSTRACT:
An SRAM memory cell that has a relatively small power consumption when writing a write value of ‘0’ to the memory cell includes cross-coupled first and second inverters, at least one read access transistor for selectively coupling a respective read bit line to a common connection node of a respective one of the first and second inverters, a switching transistor for selectively coupling the second inverter to a ground terminal, and a write access transistor for selectively coupling the common connection node of the second inverter to a write bit line.

REFERENCES:
patent: 5469380 (1995-11-01), Iio
patent: 5847990 (1998-12-01), Irrinki et al.
patent: 5959931 (1999-09-01), Ueda
patent: 6055177 (2000-04-01), Narayana et al.
patent: 6061268 (2000-05-01), Kuo et al.
patent: 6091626 (2000-07-01), Madan
patent: 6711086 (2004-03-01), Terada
patent: 2007/0041239 (2007-02-01), Takeda
patent: 41100775 (1999-01-01), None

Affiliated with

Also associated with

Rating

Low-power SRAM memory cell does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Low-power SRAM memory cell, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low-power SRAM memory cell will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3975952