Low power, slew rate insensitive power-on reset circuit

Details Low power, slew rate insensitive power-on reset circuit Low power, slew rate insensitive power-on reset circuit

1994-08-05

1996-09-03

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327198, 327 81, H03K 1722

Patent

active

055527256

ABSTRACT:
An improved power-on reset circuit is provided for controlling reset signal transition until after the power supply has achieved operational levels. Specifically, the reset signal is designated to transition from a high to a low state after the power supply exceeds a fixed reference voltage. The reference voltage is set at a voltage value greater than the operational voltage level of devices within a load circuit connected to the output of the power-on reset circuit. The power-on reset circuit includes numerous subcircuits used to define the reference voltage, trigger the reference voltage in relation to the power supply voltage, delay the triggered voltage, and buffer the delayed, triggered voltage to a reset value capable of driving load circuit impedances.

REFERENCES:
patent: 4633107 (1986-12-01), Norsworthy
patent: 5039875 (1991-08-01), Chang
patent: 5118968 (1992-06-01), Douglas et al.
patent: 5149990 (1992-09-01), Yamazaki et al.
patent: 5164621 (1992-11-01), Miyamoto
patent: 5166546 (1992-11-01), Savignac et al.
patent: 5180926 (1993-01-01), Skripek
patent: 5287011 (1994-02-01), Koshikawa et al.

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