Low power random access memory with self-refreshing cells

Details Low power random access memory with self-refreshing cells Low power random access memory with self-refreshing cells

1978-02-08

1978-10-24

Hecker, Stuart H.

Static information storage and retrieval

Read/write circuit

Data refresh

365149, 365194, G11C 700, G11C 706

Patent

active

041225503

ABSTRACT:
An MOS RAM employing capacitive storage cells where each cell includes a refreshing network which receives an AC signal for refreshing is disclosed. The refreshing signal is applied to the refreshing network through a depletion mode device which acts as a variable capacitor. Lower capacitance is provided when one binary state is stored in the cell, thus preventing undesirable charge from being retained within the cell when the opposite binary state is written into the cell. The refreshing signal is completely asynchronous with memory timing signals; thus, the memory may be accessed at any time.

REFERENCES:
patent: 3866061 (1975-02-01), Wen et al.
patent: 4030083 (1977-06-01), Boll
Boll et al., Automatic Refresh Dynamic Memory, ISSCC 76, 2/19/76, pp. 132, 133, of Digest of Technical Papers.

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