Low-power, p-channel enhancement-type metal-oxide...

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Reexamination Certificate

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C365S156000, C365S227000, C257S393000, C257S903000

Reexamination Certificate

active

11186395

ABSTRACT:
Low-power, all-p-channel enhancement-type metal-oxide semiconductor field-effect transistor (PMOSFET) SRAM cells are disclosed. A PMOSFET SRAM cell is disclosed. The SRAM cell can include a latch having first and second PMOSFETs for storing data. Further, a gate of the first PMOSFET is connected to a drain of the second PMOSFET at a first memory node. A gate of the second PMOSFET is connected to a drain of the first PMOSFET at a second memory node. The SRAM cell can also include third and fourth PMOSFETs forming a pull-down circuit. A source of the third PMOSFET is connected to the first memory node. Further, a source of the fourth PMOSFET is connected to the second memory node. The SRAM cell can include access circuitry for accessing data at the first and second memory nodes for read or write operations.

REFERENCES:
patent: 4990974 (1991-02-01), Vinal
patent: 5222039 (1993-06-01), Vinal
patent: 5635731 (1997-06-01), Ashida
patent: 5870330 (1999-02-01), Chan et al.
patent: 6141240 (2000-10-01), Madan et al.
patent: 2004/0001373 (2004-01-01), Liaw et al.
patent: WO 2006/012444 (2006-02-01), None
International Search Report with Written Opinion dated Oct. 23, 2006.
International Preliminary Report on Patentability dated Feb. 1, 2007.

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