Low power operation control unit and program optimizing method

Details Low power operation control unit and program optimizing method Low power operation control unit and program optimizing method

2008-09-30

2008-09-30

Elamin, Abdelmoniem (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S320000, C713S321000, C713S322000, C713S324000, C712S043000, C712S208000, C712S229000

Reexamination Certificate

active

11500456

ABSTRACT:
An objective is to perform a low power operation of a microprocessor on the pipeline stage of an instruction decode and a preceding pipeline stage without the necessity for increasing a circuit size or decoding time. An instruction code of each program for performing an instruction includes a first instruction set, which includes a flag for specifying predicate (301), and one or more second instruction sets including control specification information (302). A low power operation of each control circuit is performed for each instruction according to the instruction execution control function. Thus, without the necessity for increasing a circuit size or decoding time, it is possible to control the pipeline stage of an instruction decode and a preceding pipeline stage, achieving a low power operation of the microprocessor.

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