Low power module

Details Low power module Low power module

1993-02-09

1996-01-09

Hudspeth, David R.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

326 34, 326 83, H03K 19094

Patent

active

054831768

ABSTRACT:
A timekeeping integrated circuit with devices partitioned into areas with different power supplies and level translators between the areas; the level translators use a memory cell for isolation and to shorten the signal active time for low power consumption. Also a one-wire communication port with low power input buffers may be used to detect very slowly varying voltages. The input buffers include staged decreasing resistors as a power dissipation limitation.

REFERENCES:
patent: 3651340 (1972-03-01), Cliff
patent: 4209713 (1980-06-01), Satou et al.
patent: 4833350 (1989-05-01), Frisch
patent: 4853560 (1989-08-01), Iwamura et al.
patent: 4897564 (1990-01-01), Chen
patent: 5151622 (1992-09-01), Thrower et al.
patent: 5179298 (1993-01-01), Hirano et al.
patent: 5276365 (1994-01-01), Maekawa
Hayt & Kemmerly, Engineering Circuit Analysis, McGraw-Hill Book Co., New York 1962, pp. 27-28.

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