Low power low area precharge technique for a content...

Details Low power low area precharge technique for a content... Low power low area precharge technique for a content...

2006-12-05

2006-12-05

Dinh, Son T. (Department: 2824)

Static information storage and retrieval

Associative memories

Ferroelectric cell

C365S194000, C365S203000, C365S204000

Reexamination Certificate

active

07145789

ABSTRACT:
A technique to pre-charge a CAM block array including a plurality of CAM blocks that is organized into at least one rectangular array having rows each having a plurality of CAM blocks, an associated GMAT line, an associated LMAT line, and a group of CAM cells. The pre-charge technique of the present invention accommodates for all CAM block configurations without compromising performance at the cost of silicon area. In one example embodiment, this is accomplished by precharging each LMAT line in the CAM block array. A predetermined amount of delay is then applied substantially after precharging each LMAT line. Each GMAT line in the CAM block array is then precharged.

REFERENCES:
patent: 6430073 (2002-08-01), Batson et al.
patent: 6539466 (2003-03-01), Riedlinger
patent: 6580628 (2003-06-01), Barnes
patent: 6775168 (2004-08-01), Park et al.

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